Commit Graph

1200956 Commits

Author SHA1 Message Date
Ran Sun
05dfc1beeb drm/amdgpu/powerplay: Clean up errors in smu_helper.h
Fix the following errors reported by checkpatch:

ERROR: space prohibited before that close parenthesis ')'

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:59 -04:00
Ran Sun
c34a278425 drm/amd: Clean up errors in vega10_processpptables.c
Fix the following errors reported by checkpatch:

ERROR: "foo* bar" should be "foo *bar"
ERROR: space required before the open brace '{'
ERROR: space required before the open parenthesis '('

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:57 -04:00
Ran Sun
08b4dc2fdb drm/amd: Clean up errors in pptable_v1_0.h
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:55 -04:00
Ran Sun
a88c30a72a drm/amd: Clean up errors in smu7_hwmgr.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line
ERROR: spaces required around that '=' (ctx:VxV)
ERROR: spaces required around that '<' (ctx:VxV)

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:53 -04:00
Ran Sun
1f9f09da72 drm/amd/pm: Clean up errors in vega10_pptable.h
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:50 -04:00
Ran Sun
7822335012 drm/amdgpu: Clean up errors in ppatomctrl.h
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:48 -04:00
Ran Sun
958f27fc52 drm/amdgpu: Clean up errors in ci_baco.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:46 -04:00
Ran Sun
53fa57d218 drm/amdgpu: Clean up errors in smu_helper.c
Fix the following errors reported by checkpatch:

ERROR: spaces required around that '=' (ctx:VxV)
ERROR: spaces required around that '<' (ctx:VxV)

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:44 -04:00
Ran Sun
df70be37ef drm/amdgpu: Clean up errors in common_baco.c
Fix the following errors reported by checkpatch:

ERROR: code indent should use tabs where possible

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:42 -04:00
Ran Sun
4e01bbec4b drm/amdgpu: Clean up errors in smu7_powertune.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line
ERROR: space required after that ',' (ctx:VxV)

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:40 -04:00
Ran Sun
cbe2d154aa drm/amd/pm: Clean up errors in vega12_baco.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:38 -04:00
Ran Sun
c066a9e4bf drm/amd/pm: Clean up errors in vega12_pptable.h
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line
ERROR: space prohibited before open square bracket '['

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:36 -04:00
Ran Sun
223ba2133e drm/amd/pm: Clean up errors in vega10_powertune.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line
ERROR: space prohibited after that open parenthesis '('

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:33 -04:00
Ran Sun
ba5d222a6f drm/amd/pm: Clean up errors in fiji_baco.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:31 -04:00
Ran Sun
4a3026b21f drm/amd/pm: Clean up errors in smu10_hwmgr.c
Fix the following errors reported by checkpatch:

ERROR: spaces required around that '=' (ctx:VxW)
ERROR: space required after that ',' (ctx:VxV)

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:29 -04:00
Ran Sun
16d122338b drm/amd/pm/powerplay/hwmgr/ppevvmath: Clean up errors in ppevvmath.h
Fix the following errors reported by checkpatch:

ERROR: return is not a function, parentheses are not required
ERROR: space required after that ',' (ctx:VxV)
ERROR: space required before the open parenthesis '('
ERROR: need consistent spacing around '-' (ctx:WxV)

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:27 -04:00
Ran Sun
28b3a7330c drm/amd/pm: Clean up errors in vega12_hwmgr.c
Fix the following errors reported by checkpatch:

ERROR: need consistent spacing around '/' (ctx:WxV)
ERROR: code indent should use tabs where possible

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:24 -04:00
Ran Sun
16213ee9f2 drm/amd/pm: Clean up errors in vega10_baco.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line
ERROR: space required after that ',' (ctx:VxV)
ERROR: space prohibited before that ',' (ctx:WxV)

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:22 -04:00
Ran Sun
37d67a7adf drm/amd/pm: Clean up errors in amd_powerplay.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line
ERROR: spaces required around that '||' (ctx:WxO)

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:21 -04:00
Ran Sun
3e6ef49f53 drm/amd/pm: Clean up errors in amdgpu_smu.c
Fix the following errors reported by checkpatch:

ERROR: spaces required around that '=' (ctx:WxV)
ERROR: spaces required around that '&&' (ctx:VxW)
ERROR: that open brace { should be on the previous line
ERROR: space required before the open parenthesis '('
ERROR: space required before the open brace '{'
ERROR: spaces required around that ':' (ctx:VxW)

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:18 -04:00
Ran Sun
f931b011ca drm/amd: Clean up errors in smu_v13_0_5_ppt.c
Fix the following errors reported by checkpatch:

ERROR: space prohibited before that ',' (ctx:WxW)

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:15 -04:00
Ran Sun
20e688a870 drm/amd/pm: Clean up errors in smu_v13_0_5_ppt.c
Fix the following errors reported by checkpatch:

ERROR: space prohibited before that ',' (ctx:WxW)

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:13 -04:00
Ran Sun
d397fa5e52 drm/amd/pm: Clean up errors in smu_v13_0_6_ppt.c
Fix the following errors reported by checkpatch:

ERROR: code indent should use tabs where possible
ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:10 -04:00
Ran Sun
8c3d5b404d drm/amd/pm: Clean up errors in aldebaran_ppt.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line
ERROR: space required after that ',' (ctx:VxV)
ERROR: spaces required around that '=' (ctx:VxW)
ERROR: else should follow close brace '}'

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:08 -04:00
Ran Sun
6e215e108a drm/amd/pm: Clean up errors in smu_v13_0.c
Fix the following errors reported by checkpatch:

ERROR: space required before the open parenthesis '('
ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:06 -04:00
Ran Sun
09d97d0acc drm/amd/pm: Clean up errors in smu_v13_0_7_ppt.c
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line
ERROR: spaces required around that '=' (ctx:VxW)
ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:04 -04:00
Ran Sun
26272ed708 drm/amd/pm: Clean up errors in smu_v11_0.h
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line
ERROR: code indent should use tabs where possible

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:40:01 -04:00
Ruan Jinjie
3b780089fd drm/amdgpu: Remove a lot of unnecessary ternary operators
There are many ternary operators, the true or false judgement
of which is unnecessary in C language semantics.

Signed-off-by: Ruan Jinjie <ruanjinjie@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:39:56 -04:00
Denis Arefev
665fdce51b drm/amd/display: Return value of function
Added return value check hpd_enable

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Signed-off-by: Denis Arefev <arefev@swemel.ru>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:39:52 -04:00
Alex Deucher
73b0648179 drm/amdgpu: fix possible UAF in amdgpu_cs_pass1()
Since the gang_size check is outside of chunk parsing
loop, we need to reset i before we free the chunk data.

Suggested by Ye Zhang (@VAR10CK) of Baidu Security.

Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:39:40 -04:00
Lijo Lazar
7748ce5b69 drm/amdgpu: Report vbios version instead of PN
Report VBIOS version in vbios_version sysfs node instead of part number.
Part number remains constant for a SKU type.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:09 -04:00
Martin Leung
98bb4ee9cf drm/amd/display: Promote DAL to 3.2.246
This version brings along following fixes:
- Fix a regression in blank pixel data caused by coding mistake
- Fix a bug when searching for insert_above_mpcc
- Update add plane to context logic with a new algorithm
- Adjust visual confirm dpp height offset to be 1/240 of v addressable
- Add interface to enable DPIA trace
- Support plane clip with zero recout size
- Blocking invalid 420 modes on HDMI TMDS for DCN31 and DCN314
- Make mpc32 functions available to future DCNs
- Change HDCP update sequence for DM

Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Martin Leung <martin.leung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:09 -04:00
Bhawanpreet Lakha
393e834848 drm/amd/display: Change HDCP update sequence for DM
Refactor the sequence in hdcp_update_display() to use
mod_hdcp_update_display().

Previous sequence:
	- remove()->add()

This Sequence was used to update the display, (mod_hdcp_update_display
didn't exist at the time). This meant for any hdcp updates (type changes,
enable/disable) we would remove, reconstruct, and add. This leads to
unnecessary calls to psp eventually

New Sequence using mod_hdcp_update_display():
	- add() once when stream is enabled
	- use update() for all updates

The update function checks for prev == new states and will not
unnecessarily end up calling psp via add/remove.

Reviewed-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:09 -04:00
Wenjing Liu
198f0e8953 drm/amd/display: rename acquire_idle_pipe_for_layer to acquire_free_pipe_as_sec_dpp_pipe
[why]
Secondary DPP pipes are used for rendering secondary layers of planes.
The name "for layer" doesn't make it obvious. The function is acquiring
a free pipe as secondary dpp pipe only. We rename it so it is more obvious.
In a future follow up change, we want to add functions to acquire free pipe as
opp head pipe or otg master pipe as well. They will have their separate
allocation priority.

Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:09 -04:00
Wenjing Liu
d8e3fcd3ea drm/amd/display: move idle pipe allocation logic into dcn specific layer
[why]
generic dc resource file should not know what an optimal idle pipe is
because this is dcn hardware dependent.

[how]
We move the optimial pipe searching logic in dcn specific layer.

Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:09 -04:00
Alvin Lee
2b1b838ea8 drm/amd/display: Use max memclk variable when setting max memclk
[Description]
In overclocking scenarios the max memclk could be higher
than the DC mode limit. However, for configs that don't
support MCLK switching we need to set the max memclk to
the overclocked max instead of the DC mode max or we
could result in underflow.

Reviewed-by: Samson Tam <samson.tam@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:09 -04:00
Mike Hsieh
2abc0ccf92 drm/amd/display: Add vendor Id for reference
Add a new vendor ID code for reference

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Mike Hsieh <mike.hsieh@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:09 -04:00
Leo Chen
4c6107a653 drm/amd/display: Blocking invalid 420 modes on HDMI TMDS for DCN314
[Why & How]
HDMI TMDS does not have ODM support. Filtering 420 modes that
exceed the 4096 FMT limitation on DCN314 will resolve
intermittent corruptions issues.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Leo Chen <sancchen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:09 -04:00
Leo Chen
026a71babf drm/amd/display: Blocking invalid 420 modes on HDMI TMDS for DCN31
[Why & How]
HDMI TMDS does not have ODM support. Filtering 420 modes that
exceed the 4096 FMT limitation on DCN31 will resolve
intermittent corruptions issues.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Leo Chen <sancchen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:09 -04:00
Leo Chen
1155150d0d drm/amd/display: Revert "drm/amd/display: Read down-spread percentage from lut to adjust dprefclk."
[Why & How]
Revert commit 6917b0b711 ("drm/amd/display: Read down-spread percentage from lut to adjust dprefclk.")
This change was causing 240hz display to not light up after s0i3.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Leo Chen <sancchen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:08 -04:00
Wenjing Liu
77cf0607d5 drm/amd/display: do not treat clip_rect size change as a scaling change
[why]
With previous ODM + MPO policy we will only allocate pipes when MPO plane
has intersection with current ODM slice. With this policy we have to indicate
scaling change when plane clip is updated in case plane clip change causes
MPO plane to go in or out current ODM slice.
With new ODM + MPO policy we allocate pipe independent from plane clip size
so we no longer treat it as a scaling change. There no need to do a full update
due to clip size change anymore.

Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:08 -04:00
Wenjing Liu
c5a4f9010d drm/amd/display: adjust visual confirm dpp height offset to be 1/240 of v addressable
[why]
For timing with large v addressable visual confirm is just too small. It is difficult
to tell visually which DPP we are using. On the other hand with timing with small
v addressable visual confirm is too large and covers the UI area.

[how]
We calculate visual confirm dpp height offset based on v addressable so it stays
relatively the same height i.e. 1/240 verticle portion of the screen.

Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:08 -04:00
Wenjing Liu
460ea89805 drm/amd/display: update add plane to context logic with a new algorithm
[why]
Preivous algorithm for finding an optimal idle pipe for a new plane was
implemented to handle dynamic pipe allocation when MPO plane moves
from one ODM slice to the other. Now pipe allocation is more static so
it no longer depends on the MPO plane's position. We are simplifying
our logic and remove unnecessary handling in our code.

[how]
Apply a new simplified version of pipe resource allocation logic to reduce
unnecessary flip delay caused by swapping secondary dpp pipe to other
MPC blending tree.

Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:08 -04:00
Wenjing Liu
ca030d83f5 drm/amd/display: always acquire MPO pipe for every blending tree
[why]
We only acquire MPO pipe for blending tree where the plane clip will
be rendered. If an MPO plane is outside current ODM slice rect, we will
skip pipe allocation. With new programming policy we want to allocate
pipes for every ODM slice blending tree even for those whose ODM slice
rect doesn't intersect with plane clip. This is aligned with DML validation
so the pipe topology is programmed independently from the plane's
position and dst plane size.

[how]
- Remove the logic to allocate pipe only when the MPO plane intersects
with ODM slice and replace with the new logic to always allocate pipes.
- Remove the logic to tear down ODM configuration in favor for supporting
secondary MPO planes.
- Remove the logic to use full update when MPO goes accross ODM slice
boundary.

Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:08 -04:00
Wenjing Liu
e75b965e9a drm/amd/display: support plane clip with zero recout size
[why]
If plane clip is outside current pipe's ODM slice rect, our logic will
fail validation because we assume that when a pipe is acquired
to support a plane clip, it must blend some portion of the plane
on the screen. This assumption needs to be changed.
When a pipe is acquired to render the plane, we are now allowing
it to support a case where it can take minimum viewport and draw
with zero recout size when the plane clip is outside current ODM
slice rect. The reason is that we want to allocate and get the pipe
pre-programmed so it is ready to be rendered when user moves
the plane over to the current ODM slice with a fast update.
Whereas with the existing solution when user moves the plane
over, we will need to allocate a pipe as needed and power it up
and program it through a full update. This not only impacts the
user experience with unnecessary delay of a frame but also
doesn't generate any benefit to the user because DML doesn't
support it. DML will invalidate based on worst case scenario and
it doesn't depend on the plane location. So having our
programming sequence support such dynamic pipe allocation is
not meaningful anyway.

[how]
In build scaler params allow recout to be zero size and if viewport
is smaller than minimum, set minimum viewport size.

Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:08 -04:00
Austin Zheng
4a30cc2bd2 drm/amd/display: Use DTBCLK as refclk instead of DPREFCLK
[Why]
Flash of corruption observed when UCLK switching after transitioning
from DTBCLK to DPREFCLK on subVP(DP) + subVP(HDMI) config
Scenario where DPREFCLK is required instead of DTBCLK is not expected

[How]
Always set the DTBCLK source as DTBCLK0

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Austin Zheng <austin.zheng@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:08 -04:00
Austin Zheng
6cffc78e5a drm/amd/display: Set Stream Update Flags in commit_state_no_check
[Why]
Front-end would be programmed using the stream update flags set
from the previous update and the full update should be triggered
whenever commit_state_no_check gets called.

[How]
Set all stream update flags before programming the front-end
Clear all flags that got set to avoid redundant programming

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Austin Zheng <austin.zheng@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:08 -04:00
Wesley Chalmers
d43270559c drm/amd/display: Make mpc32 functions available to future DCNs
Make the mpc32 functions available for future DCNs to use

Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Wesley Chalmers <wesley.chalmers@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:08 -04:00
Wesley Chalmers
3d028d5d60 drm/amd/display: Fix a bug when searching for insert_above_mpcc
[WHY]
Currently, when insert_plane is called with insert_above_mpcc
parameter that is equal to tree->opp_list, the function returns NULL.

[HOW]
Instead, the function should insert the plane at the top of the tree.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Wesley Chalmers <wesley.chalmers@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:08 -04:00
Stylon Wang
7ce34cbfab drm/amd/display: Enable DPIA trace with DC debug mask
[Why]
DPIA traces from DMUB is not enabled by default, which is
less convenient to debug DPIA related issues because we have
to resort to other means to enable DPIA trace.

[How]
Reuse existing DC debug mask to enable DPIA trace log from
kernel command line. This makes debugging DPIA issues easier
especially when system power state (suspend/reboot) is involved.

To turn on DPIA trace, simply add "amdgpu.dcdebugmask=0x80" to
kernel command line.

Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:08 -04:00