Add initial symmetric multi-processing (SMP) support to UML. With
this support enabled, users can tell UML to start multiple virtual
processors, each represented as a separate host thread.
In UML, kthreads and normal threads (when running in kernel mode)
can be scheduled and executed simultaneously on different virtual
processors. However, the userspace code of normal threads still
runs within their respective single-threaded stubs.
That is, SMP support is currently available both within the kernel
and across different processes, but still remains limited within
threads of the same process in userspace.
Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com>
Link: https://patch.msgid.link/20251027001815.1666872-6-tiwei.bie@linux.dev
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Pull OpenRISC updates from Stafford Horne:
"I picked up one series from Chen Miao, our Google Summer of Code
contributor, which adds OpenRISC support for static keys"
* tag 'for-linus' of https://github.com/openrisc/linux:
openrisc: Add jump label support
openrisc: Regenerate defconfigs.
openrisc: Add R_OR1K_32_PCREL relocation type module support
openrisc: Add text patching API support
It seems that ./Documentation/features/scripts/features-refresh.sh was most
recently used in December 2022, with the latest kernel release v6.1-rc7 at
that time (see commit 7f2e60ff51 ("Documentation/features: Update feature
lists for 6.1") to update the feature lists in this subdirectory. All
further changes to Documentation/features/ since then have probably been
done manually, without checking for changes in other architectures and
features, that missed to update this part of the documentation.
Running ./Documentation/features/scripts/features-refresh.sh now showed
seven changes of supported features in various architectures (one in arc,
two in parisc, one in riscv, one in openrisc, and two in um), which were
not reflected yet in the current documentation.
To confirm the sanity of this script's suggested changes, I checked if the
commit messages confirm that the features have in fact been added in the
following commits:
- commit f122668ddc ("ARC: Add eBPF JIT support")
- commit 4800a6215e ("parisc: Wire up eBPF JIT compiler")
- commit a869b8c29f ("riscv: enable mseal sysmap for RV64")
- commit 2f681ba4b3 ("um: move thread info into task")
- commit 3f17fed214 ("um: switch to regset API and depend on XSTATE")
- commit 7ce8716e27 ("openrisc: Add HAVE_REGS_AND_STACK_ACCESS_API support")
- commit b5ff52be89 ("parisc: Convert to generic clockevents")
So, update all documents to the current state with features-refresh.sh.
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@redhat.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Message-ID: <20250925073634.112142-1-lukas.bulwahn@redhat.com>
Supported a complete jump_label implementation based on the ARM64 and
RV64 version and add the CONFIG_JUMP_LABEL=y to the defconfig.
Testing was conducted using a dedicated test module jump-label-test,
provided in the link below. For detailed steps, please refer to the
README also at the provided link.
Link: https://github.com/ChenMiaoi/GSoC-2025-Final-Report/tree/main/tests/jump-label-test
Test Environment:
- Hardware: QEMU emulated OR1K
- Kernel Version: 6.17.0-rc3-dirty
- Configs: CONFIG_MODULES=y,CONFIG_MODULE_UNLOAD=y
- Toolchain: or1k-none-linux-musl-gcc 15.1.0
Test Results:
$ insmod jump_label_test.ko
[ 32.590000] Jump label performance test module loaded
[ 35.250000] Normal branch time: 1241327150 ns (124 ns per iteration)
[ 35.250000] Jump label (false) time: 706422700 ns (70 ns per iteration)
[ 35.250000] Jump label (true) time: 708913450 ns (70 ns per iteration)
$ rmmod jump_label_test.ko
[ 72.210000] Jump label test module unloaded
The results show approximately 43% improvement in branch performance
when using jump labels compared to traditional branches.
Link: https://lore.kernel.org/openrisc/aLsZ9S3X0OpKy1RM@antec/T/#u
Signed-off-by: chenmiao <chenmiao.ku@gmail.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
* 'remove-h8300' of git://git.infradead.org/users/hch/misc:
remove the h8300 architecture
This is clearly the least actively maintained architecture we have at
the moment, and probably the least useful. It is now the only one that
does not support MMUs at all, and most of the boards only support 4MB
of RAM, out of which the defconfig kernel needs more than half just
for .text/.data.
Guenter Roeck did the original patch to remove the architecture in 2013
after it had already been obsolete for a while, and Yoshinori Sato brought
it back in a much more modern form in 2015. Looking at the git history
since the reinstantiation, it's clear that almost all commits in the tree
are build fixes or cross-architecture cleanups:
$ git log --no-merges --format=%an v4.5.. arch/h8300/ | sort | uniq
-c | sort -rn | head -n 12
25 Masahiro Yamada
18 Christoph Hellwig
14 Mike Rapoport
9 Arnd Bergmann
8 Mark Rutland
7 Peter Zijlstra
6 Kees Cook
6 Ingo Molnar
6 Al Viro
5 Randy Dunlap
4 Yury Norov
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The nds32 architecture, also known as AndeStar V3, is a custom 32-bit
RISC target designed by Andes Technologies. Support was added to the
kernel in 2016 as the replacement RISC-V based V5 processors were
already announced, and maintained by (current or former) Andes
employees.
As explained by Alan Kao, new customers are now all using RISC-V,
and all known nds32 users are already on longterm stable kernels
provided by Andes, with no development work going into mainline
support any more.
While the port is still in a reasonably good shape, it only gets
worse over time without active maintainers, so it seems best
to remove it before it becomes unusable. As always, if it turns
out that there are mainline users after all, and they volunteer
to maintain the port in the future, the removal can be reverted.
Link: https://lore.kernel.org/linux-mm/YhdWNLUhk+x9RAzU@yamatobi.andestech.com/
Link: https://lore.kernel.org/lkml/20220302065213.82702-1-alankao@andestech.com/
Link: https://www.andestech.com/en/products-solutions/andestar-architecture/
Signed-off-by: Alan Kao <alankao@andestech.com>
[arnd: rewrite changelog to provide more background]
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Since commit bcf9033e54 ("sched: move CPU field back into thread_info
if THREAD_INFO_IN_TASK=y"), the CPU field in thread_info went back to
being managed by the core code, so we no longer have to keep it in sync
in arch code.
While at it, mark THREAD_INFO_IN_TASK as done for ARM in the
documentation.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
This implements the CONFIG_THREAD_INFO_IN_TASK option.
With this change:
- before thread_info was part of the stack and located at the beginning of the stack
- now the thread_info struct is moved and located inside the task_struct structure
- the stack is allocated and handled like the major other platforms
- drop the cpu field of thread_info and use instead the one in task_struct
Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Pull RISC-V updates from Palmer Dabbelt:
"We have a lot of new kernel features for this merge window:
- ARCH_SUPPORTS_ATOMIC_RMW, to allow OSQ locks to be enabled
- The ability to enable NO_HZ_FULL
- Support for enabling kcov, kmemleak, stack protector, and VM
debugging
- JUMP_LABEL support
There are also a handful of cleanups"
* tag 'riscv-for-linus-5.9-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (24 commits)
riscv: disable stack-protector for vDSO
RISC-V: Fix build warning for smpboot.c
riscv: fix build warning of mm/pageattr
riscv: Fix build warning for mm/init
RISC-V: Setup exception vector early
riscv: Select ARCH_HAS_DEBUG_VM_PGTABLE
riscv: Use generic pgprot_* macros from <linux/pgtable.h>
mm: pgtable: Make generic pgprot_* macros available for no-MMU
riscv: Cleanup unnecessary define in asm-offset.c
riscv: Add jump-label implementation
riscv: Support R_RISCV_ADD64 and R_RISCV_SUB64 relocs
Replace HTTP links with HTTPS ones: RISC-V
riscv: Add STACKPROTECTOR supported
riscv: Fix typo in asm/hwcap.h uapi header
riscv: Add kmemleak support
riscv: Allow building with kcov coverage
riscv: Enable context tracking
riscv: Support irq_work via self IPIs
riscv: Enable LOCKDEP_SUPPORT & fixup TRACE_IRQFLAGS_SUPPORT
riscv: Fixup lockdep_assert_held with wrong param cpu_running
...
The unicore32 port do not seem maintained for a long time now, there is no
upstream toolchain that can create unicore32 binaries and all the links to
prebuilt toolchains for unicore32 are dead. Even compilers that were
available are not supported by the kernel anymore.
Guenter Roeck says:
I have stopped building unicore32 images since v4.19 since there is no
available compiler that is still supported by the kernel. I am surprised
that support for it has not been removed from the kernel.
Remove unicore32 port.
Signed-off-by: Mike Rapoport <rppt@linux.ibm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Use 3-byte 'nop' and 'j' instructions that are always present. Don't let
assembler mark a spot right after patchable 'j' instruction as
unreachable and later put literals or padding bytes there. Add separate
implementations of patch_text for SMP and UP cases, avoiding use of
atomics on UP.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Commit 6077776b59 split 'HAVE_BPF_JIT' into cBPF and eBPF variant.
Adds arch support status files for the new variants, and removes the
status file corresponding to 'HAVE_BPT_JIT'. The new status matrices
were auto-generated using the script 'features-refresh.sh'.
Signed-off-by: Andrea Parri <andrea.parri@amarulasolutions.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
A number of architecture ports are obsolete and getting dropped,
so we no longer want to track the respective features.
We already removed the lines for metag and mn10300, this does
the same edits for all the others.
For the remaining 21 architectures, this shows how many are known
to implement each given feature:
19 time/modern-timekeeping/arch-support.txt
19 time/clockevents/arch-support.txt
15 core/tracehook/arch-support.txt
14 core/generic-idle-thread/arch-support.txt
13 locking/lockdep/arch-support.txt
12 io/dma-api-debug/arch-support.txt
11 debug/kgdb/arch-support.txt
10 time/virt-cpuacct/arch-support.txt
9 debug/kretprobes/arch-support.txt
9 debug/kprobes/arch-support.txt
8 vm/THP/arch-support.txt
8 vm/pte_special/arch-support.txt
8 vm/numa-memblock/arch-support.txt
8 io/sg-chain/arch-support.txt
7 perf/kprobes-event/arch-support.txt
7 locking/rwsem-optimized/arch-support.txt
7 debug/gcov-profile-all/arch-support.txt
7 core/jump-labels/arch-support.txt
7 core/BPF-JIT/arch-support.txt
6 vm/ELF-ASLR/arch-support.txt
6 time/context-tracking/arch-support.txt
6 seccomp/seccomp-filter/arch-support.txt
6 debug/stackprotector/arch-support.txt
5 time/irq-time-acct/arch-support.txt
5 io/dma-contiguous/arch-support.txt
5 debug/uprobes/arch-support.txt
4 vm/ioremap_prot/arch-support.txt
4 time/arch-tick-broadcast/arch-support.txt
4 perf/perf-stackdump/arch-support.txt
4 perf/perf-regs/arch-support.txt
3 debug/KASAN/arch-support.txt
2 vm/PG_uncached/arch-support.txt
2 vm/huge-vmap/arch-support.txt
2 sched/numa-balancing/arch-support.txt
2 sched/membarrier-sync-core/arch-support.txt
2 locking/cmpxchg-local/arch-support.txt
2 debug/optprobes/arch-support.txt
2 debug/kprobes-on-ftrace/arch-support.txt
1 vm/TLB/arch-support.txt
1 locking/queued-spinlocks/arch-support.txt
1 locking/queued-rwlocks/arch-support.txt
1 debug/user-ret-profiler/arch-support.txt
0 lib/strncasecmp/arch-support.txt
Note that the list does not include riscv or nds32 yet, these still
need to be added.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Since commit 64e2a42bca ("parisc: Add ARCH_TRACEHOOK and regset
support") in v4.7, parisc selects HAVE_ARCH_TRACEHOOK, so update its
entry in Documentation/features from TODO to ok.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
Cc: Helge Deller <deller@gmx.de>
Cc: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
