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drm/i915/psr: modify psr status debugfs to support eDP Panel Replay

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Some PSR2_CTL bits are applicable for eDP panel replay as well.
Dump this register for eDP Panel Replay as well.

Bspec: 68920

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240528114455.175961-6-jouni.hogander@intel.com
This commit is contained in:
Jouni Högander
2024-05-28 14:44:55 +03:00
parent f0faeb2e70
commit fec7efe7bf
1 changed files with 10 additions and 1 deletions
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11
drivers/gpu/drm/i915/display/intel_psr.c
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@@ -3628,7 +3628,7 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
struct intel_psr *psr = &intel_dp->psr;
intel_wakeref_t wakeref;
bool enabled;
u32 val;
u32 val, psr2_ctl;
intel_psr_sink_capability(intel_dp, m);
@@ -3649,6 +3649,12 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
if (psr->panel_replay_enabled) {
val = intel_de_read(dev_priv, TRANS_DP2_CTL(cpu_transcoder));
if (intel_dp_is_edp(intel_dp))
psr2_ctl = intel_de_read(dev_priv,
EDP_PSR2_CTL(dev_priv,
cpu_transcoder));
enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
} else if (psr->sel_update_enabled) {
val = intel_de_read(dev_priv,
@@ -3660,6 +3666,9 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
}
seq_printf(m, "Source PSR/PanelReplay ctl: %s [0x%08x]\n",
str_enabled_disabled(enabled), val);
if (psr->panel_replay_enabled && intel_dp_is_edp(intel_dp))
seq_printf(m, "PSR2_CTL: 0x%08x\n",
psr2_ctl);
psr_source_status(intel_dp, m);
seq_printf(m, "Busy frontbuffer bits: 0x%08x\n",
psr->busy_frontbuffer_bits);