dt-bindings: pinctrl: airoha: en7581: allow configuration of pcie_reset pins as gpio or pwm

In the an7581 case
 * gpio47 and pcie_reset0 shares the same pin,
 * gpio48 and pcie_reset1 shares the same pin,
 * gpio49 and pcie_reset2 shares the same pin.

Let's define a way to configure these pins as gpio or pwm.
Also add gpio-range property in the dts example.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
Mikhail Kshevetskiy
2026-08-07 01:05:44 +03:00
committed by Linus Walleij
parent d560e28bdc
commit fdce588071

View File

@@ -61,7 +61,7 @@ patternProperties:
description:
A string containing the name of the function to mux to the group.
enum: [pon, tod_1pps, sipo, mdio, uart, i2c, jtag, pcm, spi,
pcm_spi, i2s, emmc, pnand, pcie_reset, pwm, phy1_led0,
pcm_spi, i2s, emmc, pnand, gpio, pcie_reset, pwm, phy1_led0,
phy2_led0, phy3_led0, phy4_led0, phy1_led1, phy2_led1,
phy3_led1, phy4_led1]
@@ -187,6 +187,14 @@ patternProperties:
properties:
groups:
enum: [pnand]
- if:
properties:
function:
const: gpio
then:
properties:
groups:
enum: [gpio47, gpio48, gpio49]
- if:
properties:
function:
@@ -208,7 +216,8 @@ patternProperties:
gpio20, gpio21, gpio22, gpio23, gpio24, gpio25,
gpio26, gpio27, gpio28, gpio29, gpio30, gpio31,
gpio36, gpio37, gpio38, gpio39, gpio40, gpio41,
gpio42, gpio43, gpio44, gpio45, gpio46, gpio47]
gpio42, gpio43, gpio44, gpio45, gpio46, gpio47,
gpio48, gpio49]
- if:
properties:
function:
@@ -347,6 +356,8 @@ examples:
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&pinctrl 0 13 50>;
pcie1-rst-pins {
conf {
pins = "pcie_reset1";