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dt-bindings: pinctrl: airoha: en7581: allow configuration of pcie_reset pins as gpio or pwm
In the an7581 case * gpio47 and pcie_reset0 shares the same pin, * gpio48 and pcie_reset1 shares the same pin, * gpio49 and pcie_reset2 shares the same pin. Let's define a way to configure these pins as gpio or pwm. Also add gpio-range property in the dts example. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
committed by
Linus Walleij
parent
d560e28bdc
commit
fdce588071
@@ -61,7 +61,7 @@ patternProperties:
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description:
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A string containing the name of the function to mux to the group.
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enum: [pon, tod_1pps, sipo, mdio, uart, i2c, jtag, pcm, spi,
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pcm_spi, i2s, emmc, pnand, pcie_reset, pwm, phy1_led0,
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pcm_spi, i2s, emmc, pnand, gpio, pcie_reset, pwm, phy1_led0,
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phy2_led0, phy3_led0, phy4_led0, phy1_led1, phy2_led1,
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phy3_led1, phy4_led1]
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@@ -187,6 +187,14 @@ patternProperties:
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properties:
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groups:
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enum: [pnand]
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- if:
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properties:
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function:
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const: gpio
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then:
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properties:
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groups:
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enum: [gpio47, gpio48, gpio49]
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- if:
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properties:
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function:
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@@ -208,7 +216,8 @@ patternProperties:
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gpio20, gpio21, gpio22, gpio23, gpio24, gpio25,
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gpio26, gpio27, gpio28, gpio29, gpio30, gpio31,
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gpio36, gpio37, gpio38, gpio39, gpio40, gpio41,
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gpio42, gpio43, gpio44, gpio45, gpio46, gpio47]
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gpio42, gpio43, gpio44, gpio45, gpio46, gpio47,
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gpio48, gpio49]
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- if:
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properties:
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function:
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@@ -347,6 +356,8 @@ examples:
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&pinctrl 0 13 50>;
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pcie1-rst-pins {
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conf {
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pins = "pcie_reset1";
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