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drm/amd/display: Add Support for HDMI Compliance Automation
Add support to get DUT trained at FRL link rate when working with Teledyne M41h compliance automation. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
c1199393ec
commit
fcf4919cd8
@@ -877,6 +877,9 @@ struct amdgpu_dm_connector {
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unsigned int hdmi_hpd_debounce_delay_ms;
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struct delayed_work hdmi_hpd_debounce_work;
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struct dc_sink *hdmi_prev_sink;
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/* HDMI compliance automation */
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bool hdmi_comp_auto;
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};
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static inline void amdgpu_dm_set_mst_status(uint8_t *status,
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@@ -573,6 +573,11 @@ void amdgpu_dm_update_connector_after_detect(
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amdgpu_dm_update_freesync_caps(connector, aconnector->drm_edid, true);
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amdgpu_dm_update_connector_ext_caps(aconnector);
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dm_set_panel_type(aconnector);
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if (aconnector->hdmi_comp_auto) {
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if (sink->sink_signal != SIGNAL_TYPE_HDMI_FRL)
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sink->sink_signal = SIGNAL_TYPE_HDMI_FRL;
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}
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} else {
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hdmi_cec_unset_edid(aconnector);
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drm_dp_cec_unset_edid(&aconnector->dm_dp_aux.aux);
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@@ -2982,6 +2982,64 @@ static ssize_t hdmi_cec_state_write(struct file *f, const char __user *buf,
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return size;
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}
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/**
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* hdmi_automation_enable - Enable/Disable HDMI automation feature
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* @f: file structure.
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* @buf: userspace buffer. set to '1' to enable; '0' to disable automation feature.
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* @size: size of buffer from userpsace.
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* @pos: unused.
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*
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* Return size on success, error code on failure
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*/
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static ssize_t hdmi_automation_enable(struct file *f, const char __user *buf,
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size_t size, loff_t *pos)
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{
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struct amdgpu_dm_connector *aconnector = file_inode(f)->i_private;
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char *wr_buf = NULL;
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const uint32_t wr_buf_size = 40;
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int max_param_num = 1;
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uint8_t param_nums = 0;
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long param[2];
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bool hdmi_comp_auto;
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if (size == 0)
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return -EINVAL;
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wr_buf = kcalloc(wr_buf_size, sizeof(char), GFP_KERNEL);
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if (!wr_buf)
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return -ENOSPC;
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if (parse_write_buffer_into_params(wr_buf, wr_buf_size,
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(long *)param, buf,
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max_param_num,
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¶m_nums)) {
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kfree(wr_buf);
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return -EINVAL;
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}
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if (param_nums <= 0) {
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kfree(wr_buf);
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DRM_DEBUG_DRIVER("user data not be read\n");
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return -EINVAL;
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}
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switch (param[0]) {
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case 0:
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hdmi_comp_auto = false;
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break;
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case 1:
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default:
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hdmi_comp_auto = true;
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break;
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}
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/* Persist setting across sink re-detection/hotplug. */
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aconnector->hdmi_comp_auto = hdmi_comp_auto;
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kfree(wr_buf);
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return size;
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}
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DEFINE_SHOW_ATTRIBUTE(dp_dsc_fec_support);
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DEFINE_SHOW_ATTRIBUTE(dmub_fw_state);
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DEFINE_SHOW_ATTRIBUTE(dmub_tracebuffer);
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@@ -3099,6 +3157,12 @@ static const struct file_operations dp_mst_link_settings_debugfs_fops = {
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.llseek = default_llseek
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};
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static const struct file_operations hdmi_automation_debugfs_fops = {
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.owner = THIS_MODULE,
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.write = hdmi_automation_enable,
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.llseek = default_llseek
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};
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static const struct {
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char *name;
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const struct file_operations *fops;
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@@ -3131,7 +3195,8 @@ static const struct {
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const struct file_operations *fops;
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} hdmi_debugfs_entries[] = {
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{"hdcp_sink_capability", &hdcp_sink_capability_fops},
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{"hdmi_cec_state", &hdmi_cec_state_fops}
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{"hdmi_cec_state", &hdmi_cec_state_fops},
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{"hdmi_automation", &hdmi_automation_debugfs_fops}
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};
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/*
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@@ -193,6 +193,12 @@ enum dc_edid_status dm_helpers_parse_edid_caps(
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__func__, connector->name, edid_caps->frl_dsc_10bpc, edid_caps->frl_dsc_12bpc, \
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edid_caps->frl_dsc_all_bpp, edid_caps->frl_dsc_native_420, edid_caps->frl_dsc_max_slices, \
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edid_caps->frl_dsc_max_frl_rate, edid_caps->frl_dsc_total_chunk_kbytes);
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if (aconnector->hdmi_comp_auto) {
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edid_caps->panel_patch.hdmi_comp_auto = true;
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link->ctx->dc->debug.force_frl_max = true;
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link->ctx->dc->debug.force_frl_dsc = true;
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drm_dbg_driver(connector->dev, "%s: HDMI_FRL [%s] hdmi_comp_auto --> enabled\n", __func__, connector->name);
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}
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}
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apply_edid_quirks(link, edid_buf, edid_caps);
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