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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-10 21:14:56 -04:00
Merge branch 'pci/enumeration'
- Allow 'isolated PCI functions' (multi-function devices without a function 0) for LoongArch, similar to s390 and jailhouse (Huacai Chen) - Mask out unrelated bits in PCIE_LNKCAP_SLS2SPEED() and PCIE_LNKCTL2_TLS2SPEED(), which makes them more robust and fixes a WARN_ON_ONCE() in pcie_set_target_speed() (Jiwei Sun) - Read Link Control 2 again when retraining a link after a training failure so we try to increase the link speed (Jiwei Sun) - Allow built-in drivers, not just modular drivers, to use async initial probing (Lukas Wunner) - Support Immediate Readiness even on devices with no PM Capability (Sean Christopherson) * pci/enumeration: PCI: Support Immediate Readiness on devices without PM capabilities PCI: Allow built-in drivers to use async initial probing PCI: Adjust the position of reading the Link Control 2 register PCI: Fix link speed calculation on retrain failure PCI: Extend isolated function probing to LoongArch
This commit is contained in:
@@ -341,7 +341,6 @@ void pci_bus_add_device(struct pci_dev *dev)
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{
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struct device_node *dn = dev->dev.of_node;
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struct platform_device *pdev;
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int retval;
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/*
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* Can not put in pci_device_add yet because resources
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@@ -372,9 +371,7 @@ void pci_bus_add_device(struct pci_dev *dev)
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if (!dn || of_device_is_available(dn))
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pci_dev_allow_binding(dev);
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retval = device_attach(&dev->dev);
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if (retval < 0 && retval != -EPROBE_DEFER)
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pci_warn(dev, "device attach failed (%d)\n", retval);
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device_initial_probe(&dev->dev);
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pci_dev_assign_added(dev);
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}
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@@ -3205,7 +3205,6 @@ void pci_pm_power_up_and_verify_state(struct pci_dev *pci_dev)
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void pci_pm_init(struct pci_dev *dev)
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{
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int pm;
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u16 status;
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u16 pmc;
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device_enable_async_suspend(&dev->dev);
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@@ -3266,9 +3265,6 @@ void pci_pm_init(struct pci_dev *dev)
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pci_pme_active(dev, false);
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}
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pci_read_config_word(dev, PCI_STATUS, &status);
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if (status & PCI_STATUS_IMM_READY)
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dev->imm_ready = 1;
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pci_pm_power_up_and_verify_state(dev);
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pm_runtime_forbid(&dev->dev);
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pm_runtime_set_active(&dev->dev);
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@@ -391,12 +391,14 @@ void pci_bus_put(struct pci_bus *bus);
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#define PCIE_LNKCAP_SLS2SPEED(lnkcap) \
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({ \
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((lnkcap) == PCI_EXP_LNKCAP_SLS_64_0GB ? PCIE_SPEED_64_0GT : \
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(lnkcap) == PCI_EXP_LNKCAP_SLS_32_0GB ? PCIE_SPEED_32_0GT : \
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(lnkcap) == PCI_EXP_LNKCAP_SLS_16_0GB ? PCIE_SPEED_16_0GT : \
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(lnkcap) == PCI_EXP_LNKCAP_SLS_8_0GB ? PCIE_SPEED_8_0GT : \
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(lnkcap) == PCI_EXP_LNKCAP_SLS_5_0GB ? PCIE_SPEED_5_0GT : \
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(lnkcap) == PCI_EXP_LNKCAP_SLS_2_5GB ? PCIE_SPEED_2_5GT : \
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u32 lnkcap_sls = (lnkcap) & PCI_EXP_LNKCAP_SLS; \
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\
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(lnkcap_sls == PCI_EXP_LNKCAP_SLS_64_0GB ? PCIE_SPEED_64_0GT : \
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lnkcap_sls == PCI_EXP_LNKCAP_SLS_32_0GB ? PCIE_SPEED_32_0GT : \
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lnkcap_sls == PCI_EXP_LNKCAP_SLS_16_0GB ? PCIE_SPEED_16_0GT : \
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lnkcap_sls == PCI_EXP_LNKCAP_SLS_8_0GB ? PCIE_SPEED_8_0GT : \
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lnkcap_sls == PCI_EXP_LNKCAP_SLS_5_0GB ? PCIE_SPEED_5_0GT : \
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lnkcap_sls == PCI_EXP_LNKCAP_SLS_2_5GB ? PCIE_SPEED_2_5GT : \
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PCI_SPEED_UNKNOWN); \
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})
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@@ -411,13 +413,17 @@ void pci_bus_put(struct pci_bus *bus);
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PCI_SPEED_UNKNOWN)
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#define PCIE_LNKCTL2_TLS2SPEED(lnkctl2) \
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((lnkctl2) == PCI_EXP_LNKCTL2_TLS_64_0GT ? PCIE_SPEED_64_0GT : \
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(lnkctl2) == PCI_EXP_LNKCTL2_TLS_32_0GT ? PCIE_SPEED_32_0GT : \
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(lnkctl2) == PCI_EXP_LNKCTL2_TLS_16_0GT ? PCIE_SPEED_16_0GT : \
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(lnkctl2) == PCI_EXP_LNKCTL2_TLS_8_0GT ? PCIE_SPEED_8_0GT : \
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(lnkctl2) == PCI_EXP_LNKCTL2_TLS_5_0GT ? PCIE_SPEED_5_0GT : \
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(lnkctl2) == PCI_EXP_LNKCTL2_TLS_2_5GT ? PCIE_SPEED_2_5GT : \
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PCI_SPEED_UNKNOWN)
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({ \
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u16 lnkctl2_tls = (lnkctl2) & PCI_EXP_LNKCTL2_TLS; \
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\
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(lnkctl2_tls == PCI_EXP_LNKCTL2_TLS_64_0GT ? PCIE_SPEED_64_0GT : \
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lnkctl2_tls == PCI_EXP_LNKCTL2_TLS_32_0GT ? PCIE_SPEED_32_0GT : \
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lnkctl2_tls == PCI_EXP_LNKCTL2_TLS_16_0GT ? PCIE_SPEED_16_0GT : \
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lnkctl2_tls == PCI_EXP_LNKCTL2_TLS_8_0GT ? PCIE_SPEED_8_0GT : \
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lnkctl2_tls == PCI_EXP_LNKCTL2_TLS_5_0GT ? PCIE_SPEED_5_0GT : \
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lnkctl2_tls == PCI_EXP_LNKCTL2_TLS_2_5GT ? PCIE_SPEED_2_5GT : \
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PCI_SPEED_UNKNOWN); \
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})
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/* PCIe speed to Mb/s reduced by encoding overhead */
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#define PCIE_SPEED2MBS_ENC(speed) \
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@@ -2595,6 +2595,15 @@ void pcie_report_downtraining(struct pci_dev *dev)
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__pcie_print_link_status(dev, false);
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}
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static void pci_imm_ready_init(struct pci_dev *dev)
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{
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u16 status;
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pci_read_config_word(dev, PCI_STATUS, &status);
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if (status & PCI_STATUS_IMM_READY)
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dev->imm_ready = 1;
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}
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static void pci_init_capabilities(struct pci_dev *dev)
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{
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pci_ea_init(dev); /* Enhanced Allocation */
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@@ -2604,6 +2613,7 @@ static void pci_init_capabilities(struct pci_dev *dev)
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/* Buffers for saving PCIe and PCI-X capabilities */
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pci_allocate_cap_save_buffers(dev);
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pci_imm_ready_init(dev); /* Immediate Readiness */
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pci_pm_init(dev); /* Power Management */
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pci_vpd_init(dev); /* Vital Product Data */
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pci_configure_ari(dev); /* Alternative Routing-ID Forwarding */
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@@ -105,13 +105,13 @@ int pcie_failed_link_retrain(struct pci_dev *dev)
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!pcie_cap_has_lnkctl2(dev) || !dev->link_active_reporting)
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return ret;
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pcie_capability_read_word(dev, PCI_EXP_LNKCTL2, &lnkctl2);
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pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnksta);
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if (!(lnksta & PCI_EXP_LNKSTA_DLLLA) && pcie_lbms_seen(dev, lnksta)) {
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u16 oldlnkctl2 = lnkctl2;
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u16 oldlnkctl2;
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pci_info(dev, "broken device, retraining non-functional downstream link at 2.5GT/s\n");
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pcie_capability_read_word(dev, PCI_EXP_LNKCTL2, &oldlnkctl2);
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ret = pcie_set_target_speed(dev, PCIE_SPEED_2_5GT, false);
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if (ret) {
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pci_info(dev, "retraining failed\n");
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@@ -123,6 +123,8 @@ int pcie_failed_link_retrain(struct pci_dev *dev)
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pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnksta);
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}
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pcie_capability_read_word(dev, PCI_EXP_LNKCTL2, &lnkctl2);
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if ((lnksta & PCI_EXP_LNKSTA_DLLLA) &&
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(lnkctl2 & PCI_EXP_LNKCTL2_TLS) == PCI_EXP_LNKCTL2_TLS_2_5GT &&
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pci_match_id(ids, dev)) {
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@@ -37,6 +37,9 @@ static inline bool hypervisor_isolated_pci_functions(void)
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if (IS_ENABLED(CONFIG_S390))
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return true;
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if (IS_ENABLED(CONFIG_LOONGARCH))
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return true;
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return jailhouse_paravirt();
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}
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