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x86/cpu/intel: Replace Family 15 checks with VFM ones
Introduce names for some old pentium 4 models and replace the x86_model checks with VFM ones. Signed-off-by: Sohil Mehta <sohil.mehta@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Acked-by: Dave Hansen <dave.hansen@linux.intel.com> Link: https://lore.kernel.org/r/20250219184133.816753-7-sohil.mehta@intel.com
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@@ -184,6 +184,10 @@
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/* Family 5 */
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#define INTEL_QUARK_X1000 IFM(5, 0x09) /* Quark X1000 SoC */
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/* Family 15 - NetBurst */
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#define INTEL_P4_WILLAMETTE IFM(15, 0x01) /* Also Xeon Foster */
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#define INTEL_P4_PRESCOTT IFM(15, 0x03)
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/* Family 19 */
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#define INTEL_PANTHERCOVE_X IFM(19, 0x01) /* Diamond Rapids */
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@@ -247,8 +247,8 @@ static void early_init_intel(struct cpuinfo_x86 *c)
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#endif
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/* CPUID workaround for 0F33/0F34 CPU */
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if (c->x86 == 0xF && c->x86_model == 0x3
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&& (c->x86_stepping == 0x3 || c->x86_stepping == 0x4))
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if (c->x86_vfm == INTEL_P4_PRESCOTT &&
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(c->x86_stepping == 0x3 || c->x86_stepping == 0x4))
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c->x86_phys_bits = 36;
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/*
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@@ -421,7 +421,7 @@ static void intel_workarounds(struct cpuinfo_x86 *c)
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* P4 Xeon erratum 037 workaround.
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* Hardware prefetcher may cause stale data to be loaded into the cache.
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*/
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if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_stepping == 1)) {
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if (c->x86_vfm == INTEL_P4_WILLAMETTE && c->x86_stepping == 1) {
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if (msr_set_bit(MSR_IA32_MISC_ENABLE,
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MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE_BIT) > 0) {
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pr_info("CPU: C0 stepping P4 Xeon detected.\n");
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