arm64: dts: renesas: rcar-gen3: Add MOST devices

This patch adds the MLP device nodes to dtsi files for R-Car Gen3 SoCs
that have it.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Link: https://lore.kernel.org/r/20220120051559.746322-1-nikita.yoush@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Nikita Yushchenko
2022-01-20 08:15:59 +03:00
committed by Geert Uytterhoeven
parent 953b392aef
commit fb912a1b47
6 changed files with 72 additions and 0 deletions

View File

@@ -2412,6 +2412,18 @@ ssi9: ssi-9 {
};
};
mlp: mlp@ec520000 {
compatible = "renesas,r8a7795-mlp",
"renesas,rcar-gen3-mlp";
reg = <0 0xec520000 0 0x800>;
interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 802>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 802>;
status = "disabled";
};
audma0: dma-controller@ec700000 {
compatible = "renesas,dmac-r8a7795",
"renesas,rcar-dmac";

View File

@@ -2284,6 +2284,18 @@ ssiu97: ssiu-51 {
};
};
mlp: mlp@ec520000 {
compatible = "renesas,r8a7796-mlp",
"renesas,rcar-gen3-mlp";
reg = <0 0xec520000 0 0x800>;
interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 802>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
resets = <&cpg 802>;
status = "disabled";
};
audma0: dma-controller@ec700000 {
compatible = "renesas,dmac-r8a7796",
"renesas,rcar-dmac";

View File

@@ -2128,6 +2128,18 @@ ssiu97: ssiu-51 {
};
};
mlp: mlp@ec520000 {
compatible = "renesas,r8a77961-mlp",
"renesas,rcar-gen3-mlp";
reg = <0 0xec520000 0 0x800>;
interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 802>;
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
resets = <&cpg 802>;
status = "disabled";
};
audma0: dma-controller@ec700000 {
compatible = "renesas,dmac-r8a77961",
"renesas,rcar-dmac";

View File

@@ -2147,6 +2147,18 @@ ssi9: ssi-9 {
};
};
mlp: mlp@ec520000 {
compatible = "renesas,r8a77965-mlp",
"renesas,rcar-gen3-mlp";
reg = <0 0xec520000 0 0x800>;
interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 802>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 802>;
status = "disabled";
};
audma0: dma-controller@ec700000 {
compatible = "renesas,dmac-r8a77965",
"renesas,rcar-dmac";

View File

@@ -1682,6 +1682,18 @@ ssi9: ssi-9 {
};
};
mlp: mlp@ec520000 {
compatible = "renesas,r8a77990-mlp",
"renesas,rcar-gen3-mlp";
reg = <0 0xec520000 0 0x800>;
interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 802>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
resets = <&cpg 802>;
status = "disabled";
};
audma0: dma-controller@ec700000 {
compatible = "renesas,dmac-r8a77990",
"renesas,rcar-dmac";

View File

@@ -1132,6 +1132,18 @@ ssi4: ssi-4 {
};
};
mlp: mlp@ec520000 {
compatible = "renesas,r8a77995-mlp",
"renesas,rcar-gen3-mlp";
reg = <0 0xec520000 0 0x800>;
interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 802>;
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 802>;
status = "disabled";
};
audma0: dma-controller@ec700000 {
compatible = "renesas,dmac-r8a77995",
"renesas,rcar-dmac";