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PCI: imx6: Add i.MX8MM PCIe EP support

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Add i.MX8MM PCIe EP support.

Link: https://lore.kernel.org/r/1673847684-31893-14-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
This commit is contained in:
Richard Zhu
2023-01-16 13:41:23 +08:00
committed by Lorenzo Pieralisi
parent 530ba41250
commit fb3217e2cf
1 changed files with 17 additions and 0 deletions
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17
drivers/pci/controller/dwc/pci-imx6.c
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@@ -53,6 +53,7 @@ enum imx6_pcie_variants {
IMX8MM,
IMX8MP,
IMX8MQ_EP,
IMX8MM_EP,
};
#define IMX6_PCIE_FLAG_IMX6_PHY BIT(0)
@@ -156,6 +157,7 @@ static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie)
WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ &&
imx6_pcie->drvdata->variant != IMX8MQ_EP &&
imx6_pcie->drvdata->variant != IMX8MM &&
imx6_pcie->drvdata->variant != IMX8MM_EP &&
imx6_pcie->drvdata->variant != IMX8MP);
return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14;
}
@@ -319,6 +321,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
{
switch (imx6_pcie->drvdata->variant) {
case IMX8MM:
case IMX8MM_EP:
case IMX8MP:
/*
* The PHY initialization had been done in the PHY
@@ -577,6 +580,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
case IMX7D:
break;
case IMX8MM:
case IMX8MM_EP:
case IMX8MQ:
case IMX8MQ_EP:
case IMX8MP:
@@ -623,6 +627,7 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie)
IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
break;
case IMX8MM:
case IMX8MM_EP:
case IMX8MQ:
case IMX8MQ_EP:
case IMX8MP:
@@ -694,6 +699,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
reset_control_assert(imx6_pcie->pciephy_reset);
fallthrough;
case IMX8MM:
case IMX8MM_EP:
case IMX8MP:
reset_control_assert(imx6_pcie->apps_reset);
break;
@@ -771,6 +777,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
break;
case IMX6Q: /* Nothing to do */
case IMX8MM:
case IMX8MM_EP:
case IMX8MP:
break;
}
@@ -822,6 +829,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev)
case IMX8MQ:
case IMX8MQ_EP:
case IMX8MM:
case IMX8MM_EP:
case IMX8MP:
reset_control_deassert(imx6_pcie->apps_reset);
break;
@@ -843,6 +851,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev)
case IMX8MQ:
case IMX8MQ_EP:
case IMX8MM:
case IMX8MM_EP:
case IMX8MP:
reset_control_assert(imx6_pcie->apps_reset);
break;
@@ -1095,6 +1104,7 @@ static int imx6_add_pcie_ep(struct imx6_pcie *imx6_pcie,
switch (imx6_pcie->drvdata->variant) {
case IMX8MQ_EP:
case IMX8MM_EP:
pcie_dbi2_offset = SZ_1M;
break;
default:
@@ -1307,6 +1317,7 @@ static int imx6_pcie_probe(struct platform_device *pdev)
}
break;
case IMX8MM:
case IMX8MM_EP:
case IMX8MP:
imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux");
if (IS_ERR(imx6_pcie->pcie_aux))
@@ -1472,6 +1483,11 @@ static const struct imx6_pcie_drvdata drvdata[] = {
.mode = DW_PCIE_EP_TYPE,
.gpr = "fsl,imx8mq-iomuxc-gpr",
},
[IMX8MM_EP] = {
.variant = IMX8MM_EP,
.mode = DW_PCIE_EP_TYPE,
.gpr = "fsl,imx8mm-iomuxc-gpr",
},
};
static const struct of_device_id imx6_pcie_of_match[] = {
@@ -1483,6 +1499,7 @@ static const struct of_device_id imx6_pcie_of_match[] = {
{ .compatible = "fsl,imx8mm-pcie", .data = &drvdata[IMX8MM], },
{ .compatible = "fsl,imx8mp-pcie", .data = &drvdata[IMX8MP], },
{ .compatible = "fsl,imx8mq-pcie-ep", .data = &drvdata[IMX8MQ_EP], },
{ .compatible = "fsl,imx8mm-pcie-ep", .data = &drvdata[IMX8MM_EP], },
{},
};