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arm64: dts: imx8mp: move PCIe controller clock config to SoC dtsi

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The only difference in PCIe clock configuration between boards is how
the PCIe reference clock is generated. The refclock configuration is
fully contained in the PCIe PHY node, so the PCIe controller clocks
can be set up in the SoC dtsi, as there is no reason for any board to
use a different configuration.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Lucas Stach
2022-12-16 20:59:32 +01:00
committed by Shawn Guo
parent 0deefb5bd1
commit fae3bcc34a
3 changed files with 7 additions and 14 deletions
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7
arch/arm64/boot/dts/freescale/imx8mp-evk.dts
View File

@@ -400,13 +400,6 @@ &pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
reset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>;
clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
<&clk IMX8MP_CLK_PCIE_ROOT>,
<&clk IMX8MP_CLK_HSIO_AXI>;
clock-names = "pcie", "pcie_aux", "pcie_bus";
assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>;
assigned-clock-rates = <10000000>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>;
vpcie-supply = <&reg_pcie0>;
status = "okay";
};

7
arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
View File

@@ -593,13 +593,6 @@ &pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
reset-gpio = <&gpio2 17 GPIO_ACTIVE_LOW>;
clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
<&clk IMX8MP_CLK_PCIE_ROOT>,
<&clk IMX8MP_CLK_HSIO_AXI>;
clock-names = "pcie", "pcie_aux", "pcie_bus";
assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>;
assigned-clock-rates = <10000000>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>;
status = "okay";
};

7
arch/arm64/boot/dts/freescale/imx8mp.dtsi
View File

@@ -1202,6 +1202,13 @@ pcie: pcie@33800000 {
compatible = "fsl,imx8mp-pcie";
reg = <0x33800000 0x400000>, <0x1ff00000 0x80000>;
reg-names = "dbi", "config";
clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
<&clk IMX8MP_CLK_PCIE_ROOT>,
<&clk IMX8MP_CLK_HSIO_AXI>;
clock-names = "pcie", "pcie_aux", "pcie_bus";
assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>;
assigned-clock-rates = <10000000>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";