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drm/amdgpu: add gfp_flags to amdgpu_sa_manager v2
Make sure that we use the emmergency reserves for unrecoverable page faults and GPU resets. v2: improve code comments a bit based on Timur's feedback Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
16dda95626
commit
fa99528ce5
@@ -356,6 +356,25 @@ int amdgpu_ib_pool_init(struct amdgpu_device *adev)
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[AMDGPU_IB_POOL_IMMEDIATE] = SZ_128K,
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[AMDGPU_IB_POOL_DIRECT] = SZ_512K
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};
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const gfp_t gfp_flags[AMDGPU_IB_POOL_MAX] = {
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/*
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* For normal page table updates and recoverable retry faults
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* (for SVM), further restricted by the VM eviction lock to not
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* wait for memory reclaim.
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*/
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[AMDGPU_IB_POOL_DELAYED] = GFP_KERNEL,
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/*
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* For redirecting unrecoverable retry faults to the dummy page
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* or set the PRT bits. dma_fence submissions might depend on
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* that so we need the emmergency reserves.
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*/
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[AMDGPU_IB_POOL_IMMEDIATE] = GFP_ATOMIC,
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/*
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* For IB tests during GPU resets. Only very small and temporary
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* allocation to allow dma_fences to signal.
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*/
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[AMDGPU_IB_POOL_DIRECT] = GFP_ATOMIC
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};
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int r, i;
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if (adev->ib_pool_ready)
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@@ -363,8 +382,7 @@ int amdgpu_ib_pool_init(struct amdgpu_device *adev)
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for (i = 0; i < AMDGPU_IB_POOL_MAX; i++) {
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r = amdgpu_sa_bo_manager_init(adev, &adev->ib_pools[i],
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sizes[i], 256,
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AMDGPU_GEM_DOMAIN_GTT);
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sizes[i], gfp_flags[i]);
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if (r)
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goto error;
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}
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@@ -46,11 +46,13 @@
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int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev,
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struct amdgpu_sa_manager *sa_manager,
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unsigned int size, u32 suballoc_align, u32 domain)
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unsigned int size, gfp_t gfp_flags)
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{
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int r;
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r = amdgpu_bo_create_kernel(adev, size, AMDGPU_GPU_PAGE_SIZE, domain,
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sa_manager->gfp_flags = gfp_flags;
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r = amdgpu_bo_create_kernel(adev, size, AMDGPU_GPU_PAGE_SIZE,
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AMDGPU_GEM_DOMAIN_GTT,
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&sa_manager->bo, &sa_manager->gpu_addr,
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&sa_manager->cpu_ptr);
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if (r) {
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@@ -59,7 +61,8 @@ int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev,
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}
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memset(sa_manager->cpu_ptr, 0, size);
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drm_suballoc_manager_init(&sa_manager->base, size, suballoc_align);
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drm_suballoc_manager_init(&sa_manager->base, size, 256);
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return r;
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}
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@@ -73,7 +76,8 @@ void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev,
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drm_suballoc_manager_fini(&sa_manager->base);
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amdgpu_bo_free_kernel(&sa_manager->bo, &sa_manager->gpu_addr, &sa_manager->cpu_ptr);
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amdgpu_bo_free_kernel(&sa_manager->bo, &sa_manager->gpu_addr,
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&sa_manager->cpu_ptr);
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}
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int amdgpu_sa_bo_new(struct amdgpu_sa_manager *sa_manager,
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@@ -81,7 +85,8 @@ int amdgpu_sa_bo_new(struct amdgpu_sa_manager *sa_manager,
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unsigned int size)
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{
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struct drm_suballoc *sa = drm_suballoc_new(&sa_manager->base, size,
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GFP_KERNEL, false, 0);
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sa_manager->gfp_flags,
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false, 0);
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if (IS_ERR(sa)) {
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*sa_bo = NULL;
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@@ -110,6 +115,7 @@ void amdgpu_sa_bo_dump_debug_info(struct amdgpu_sa_manager *sa_manager,
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{
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struct drm_printer p = drm_seq_file_printer(m);
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drm_suballoc_dump_debug_info(&sa_manager->base, &p, sa_manager->gpu_addr);
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drm_suballoc_dump_debug_info(&sa_manager->base, &p,
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sa_manager->gpu_addr);
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}
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#endif
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@@ -35,6 +35,7 @@ struct amdgpu_sa_manager {
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struct amdgpu_bo *bo;
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uint64_t gpu_addr;
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void *cpu_ptr;
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gfp_t gfp_flags;
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};
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static inline struct amdgpu_sa_manager *
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@@ -57,7 +58,7 @@ static inline void *amdgpu_sa_bo_cpu_addr(struct drm_suballoc *sa_bo)
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int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev,
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struct amdgpu_sa_manager *sa_manager,
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unsigned size, u32 align, u32 domain);
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unsigned size, gfp_t gfp_flags);
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void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev,
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struct amdgpu_sa_manager *sa_manager);
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int amdgpu_sa_bo_manager_start(struct amdgpu_device *adev,
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