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arm_mpam: Add quirk framework
The MPAM specification includes the MPAMF_IIDR, which serves to uniquely identify the MSC implementation through a combination of implementer details, product ID, variant, and revision. Certain hardware issues/errata can be resolved using software workarounds. Introduce a quirk framework to allow workarounds to be enabled based on the MPAMF_IIDR value. Tested-by: Gavin Shan <gshan@redhat.com> Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com> Tested-by: Zeng Heng <zengheng4@huawei.com> Tested-by: Punit Agrawal <punit.agrawal@oss.qualcomm.com> Tested-by: Jesse Chick <jessechick@os.amperecomputing.com> Reviewed-by: Zeng Heng <zengheng4@huawei.com> Reviewed-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Gavin Shan <gshan@redhat.com> Signed-off-by: Shanker Donthineni <sdonthineni@nvidia.com> Co-developed-by: Ben Horgan <ben.horgan@arm.com> Signed-off-by: Ben Horgan <ben.horgan@arm.com> Co-developed-by: James Morse <james.morse@arm.com> Signed-off-by: James Morse <james.morse@arm.com>
This commit is contained in:
committed by
James Morse
parent
fb481ec086
commit
fa7745218c
@@ -630,6 +630,30 @@ static struct mpam_msc_ris *mpam_get_or_create_ris(struct mpam_msc *msc,
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return ERR_PTR(-ENOENT);
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}
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static const struct mpam_quirk mpam_quirks[] = {
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{ NULL } /* Sentinel */
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};
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static void mpam_enable_quirks(struct mpam_msc *msc)
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{
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const struct mpam_quirk *quirk;
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for (quirk = &mpam_quirks[0]; quirk->iidr_mask; quirk++) {
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int err = 0;
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if (quirk->iidr != (msc->iidr & quirk->iidr_mask))
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continue;
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if (quirk->init)
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err = quirk->init(msc, quirk);
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if (err)
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continue;
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mpam_set_quirk(quirk->workaround, msc);
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}
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}
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/*
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* IHI009A.a has this nugget: "If a monitor does not support automatic behaviour
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* of NRDY, software can use this bit for any purpose" - so hardware might not
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@@ -864,8 +888,11 @@ static int mpam_msc_hw_probe(struct mpam_msc *msc)
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/* Grab an IDR value to find out how many RIS there are */
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mutex_lock(&msc->part_sel_lock);
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idr = mpam_msc_read_idr(msc);
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msc->iidr = mpam_read_partsel_reg(msc, IIDR);
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mutex_unlock(&msc->part_sel_lock);
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mpam_enable_quirks(msc);
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msc->ris_max = FIELD_GET(MPAMF_IDR_RIS_MAX, idr);
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/* Use these values so partid/pmg always starts with a valid value */
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@@ -1972,6 +1999,7 @@ static bool mpam_has_cmax_wd_feature(struct mpam_props *props)
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* resulting safe value must be compatible with both. When merging values in
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* the tree, all the aliasing resources must be handled first.
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* On mismatch, parent is modified.
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* Quirks on an MSC will apply to all MSC in that class.
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*/
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static void __props_mismatch(struct mpam_props *parent,
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struct mpam_props *child, bool alias)
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@@ -2091,6 +2119,7 @@ static void __props_mismatch(struct mpam_props *parent,
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* nobble the class feature, as we can't configure all the resources.
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* e.g. The L3 cache is composed of two resources with 13 and 17 portion
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* bitmaps respectively.
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* Quirks on an MSC will apply to all MSC in that class.
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*/
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static void
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__class_props_mismatch(struct mpam_class *class, struct mpam_vmsc *vmsc)
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@@ -2104,6 +2133,9 @@ __class_props_mismatch(struct mpam_class *class, struct mpam_vmsc *vmsc)
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dev_dbg(dev, "Merging features for class:0x%lx &= vmsc:0x%lx\n",
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(long)cprops->features, (long)vprops->features);
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/* Merge quirks */
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class->quirks |= vmsc->msc->quirks;
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/* Take the safe value for any common features */
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__props_mismatch(cprops, vprops, false);
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}
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@@ -85,6 +85,8 @@ struct mpam_msc {
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u8 pmg_max;
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unsigned long ris_idxs;
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u32 ris_max;
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u32 iidr;
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u16 quirks;
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/*
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* error_irq_lock is taken when registering/unregistering the error
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@@ -216,6 +218,28 @@ struct mpam_props {
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#define mpam_set_feature(_feat, x) __set_bit(_feat, (x)->features)
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#define mpam_clear_feature(_feat, x) __clear_bit(_feat, (x)->features)
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/* Workaround bits for msc->quirks */
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enum mpam_device_quirks {
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MPAM_QUIRK_LAST
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};
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#define mpam_has_quirk(_quirk, x) ((1 << (_quirk) & (x)->quirks))
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#define mpam_set_quirk(_quirk, x) ((x)->quirks |= (1 << (_quirk)))
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struct mpam_quirk {
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int (*init)(struct mpam_msc *msc, const struct mpam_quirk *quirk);
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u32 iidr;
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u32 iidr_mask;
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enum mpam_device_quirks workaround;
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};
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#define MPAM_IIDR_MATCH_ONE (FIELD_PREP_CONST(MPAMF_IIDR_PRODUCTID, 0xfff) | \
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FIELD_PREP_CONST(MPAMF_IIDR_VARIANT, 0xf) | \
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FIELD_PREP_CONST(MPAMF_IIDR_REVISION, 0xf) | \
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FIELD_PREP_CONST(MPAMF_IIDR_IMPLEMENTER, 0xfff))
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/* The values for MSMON_CFG_MBWU_FLT.RWBW */
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enum mon_filter_options {
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COUNT_BOTH = 0,
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@@ -259,6 +283,7 @@ struct mpam_class {
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struct mpam_props props;
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u32 nrdy_usec;
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u16 quirks;
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u8 level;
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enum mpam_class_types type;
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