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scsi: ufs: exynos: Disable iocc if dma-coherent property isn't set

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If dma-coherent property isn't set then descriptors are non-cacheable
and the iocc shareability bits should be disabled. Without this UFS can
end up in an incompatible configuration and suffer from random cache
related stability issues.

Suggested-by: Bart Van Assche <bvanassche@acm.org>
Fixes: cc52e15397 ("scsi: ufs: ufs-exynos: Support ExynosAuto v9 UFS")
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20250319-exynos-ufs-stability-fixes-v2-3-96722cc2ba1b@linaro.org
Cc: Chanho Park <chanho61.park@samsung.com>
Cc: stable@vger.kernel.org
Reviewed-by: Bart Van Assche <bvanassche@acm.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Peter Griffin
2025-03-19 15:30:20 +00:00
committed by Martin K. Petersen
parent 68f5ef7eeb
commit f92bb74368
2 changed files with 15 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

17
drivers/ufs/host/ufs-exynos.c
View File

@@ -214,8 +214,8 @@ static int exynos_ufs_shareability(struct exynos_ufs *ufs)
/* IO Coherency setting */
if (ufs->sysreg) {
return regmap_update_bits(ufs->sysreg,
ufs->shareability_reg_offset,
ufs->iocc_mask, ufs->iocc_mask);
ufs->iocc_offset,
ufs->iocc_mask, ufs->iocc_val);
}
return 0;
@@ -1173,13 +1173,22 @@ static int exynos_ufs_parse_dt(struct device *dev, struct exynos_ufs *ufs)
ufs->sysreg = NULL;
else {
if (of_property_read_u32_index(np, "samsung,sysreg", 1,
&ufs->shareability_reg_offset)) {
&ufs->iocc_offset)) {
dev_warn(dev, "can't get an offset from sysreg. Set to default value\n");
ufs->shareability_reg_offset = UFS_SHAREABILITY_OFFSET;
ufs->iocc_offset = UFS_SHAREABILITY_OFFSET;
}
}
ufs->iocc_mask = ufs->drv_data->iocc_mask;
/*
* no 'dma-coherent' property means the descriptors are
* non-cacheable so iocc shareability should be disabled.
*/
if (of_dma_is_coherent(dev->of_node))
ufs->iocc_val = ufs->iocc_mask;
else
ufs->iocc_val = 0;
ufs->pclk_avail_min = PCLK_AVAIL_MIN;
ufs->pclk_avail_max = PCLK_AVAIL_MAX;

3
drivers/ufs/host/ufs-exynos.h
View File

@@ -231,8 +231,9 @@ struct exynos_ufs {
ktime_t entry_hibern8_t;
const struct exynos_ufs_drv_data *drv_data;
struct regmap *sysreg;
u32 shareability_reg_offset;
u32 iocc_offset;
u32 iocc_mask;
u32 iocc_val;
u32 opts;
#define EXYNOS_UFS_OPT_HAS_APB_CLK_CTRL BIT(0)