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drm/xe: Add support for WA 16029897822

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The WA is implemented by the GuC, so we just need to enable it via the
dedicated KLV.
This WA is supported starting from GuC 70.69. Note that the GuC does not
enable the relevant feature on NVL-S, so this WA can't (and shouldn't)
be enabled on that platform.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Julia Filipchuk <julia.filipchuk@intel.com>
Link: https://patch.msgid.link/20260706224344.2723462-4-daniele.ceraolospurio@intel.com
This commit is contained in:
Daniele Ceraolo Spurio
2026-07-06 15:43:46 -07:00
parent 0af278683c
commit f543084cdb
3 changed files with 9 additions and 0 deletions
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1
drivers/gpu/drm/xe/abi/guc_klvs_abi.h
View File

@@ -513,6 +513,7 @@ enum xe_guc_klv_ids {
GUC_WA_KLV_RESTORE_UNSAVED_MEDIA_CONTROL_REG = 0x900c,
GUC_WA_KLV_CLR_CS_INDIRECT_RING_STATE_IF_IDLE_AT_CTX_REG = 0x900e,
GUC_WA_KLV_REMAP_RANGED_TLB_INV = 0x900f,
GUC_WA_KLV_IGNORE_MMIO_READ_SEM_TOKEN_64 = 0x9010,
};
#endif

6
drivers/gpu/drm/xe/xe_guc_ads.c
View File

@@ -367,6 +367,12 @@ static void guc_waklv_init(struct xe_guc_ads *ads)
if (XE_GT_WA(gt, 22022079272) && GUC_FIRMWARE_VER_AT_LEAST(&gt->uc.guc, 70, 62))
guc_waklv_enable(ads, NULL, 0, &offset, &remain, GUC_WA_KLV_REMAP_RANGED_TLB_INV);
/* The GuC does not enable the sem_tok_64 feature on NVL-S */
if (XE_GT_WA(gt, 16029897822) && gt_to_xe(gt)->info.platform != XE_NOVALAKE_S &&
GUC_FIRMWARE_VER_AT_LEAST(&gt->uc.guc, 70, 69))
guc_waklv_enable(ads, NULL, 0, &offset, &remain,
GUC_WA_KLV_IGNORE_MMIO_READ_SEM_TOKEN_64);
size = guc_ads_waklv_size(ads) - remain;
if (!size)
return;

2
drivers/gpu/drm/xe/xe_wa_oob.rules
View File

@@ -69,3 +69,5 @@
22022079272 MEDIA_VERSION(3503)
GRAPHICS_VERSION(3510)
GRAPHICS_VERSION(3511)
16029897822 MEDIA_VERSION(3500)
GRAPHICS_VERSION(3510)