dt-bindings: serial: maxim,max310x: describe per-channel rs485 subnodes

The MAX310x is a family of one- (max3107, max3108), two- (max3109) and
four-channel (max14830) UARTs. The binding pulls in
/schemas/serial/rs485.yaml at the chip level, describing a single set of
RS-485 properties - enough for the single-channel parts, but a
multi-channel chip can wire RS-485 differently on each channel.

Split the binding per compatible:

 - single-channel parts (max3107, max3108): the chip node is itself the
   serial port and carries the RS-485 properties, as before;

 - multi-channel parts (max3109, max14830): the chip node is only a
   container and is no longer a serial node; each channel is a "serial@N"
   subnode that carries the standard serial.yaml/rs485.yaml properties
   (and may host a serial slave device). max3109 has channels 0-1,
   max14830 has 0-3.

This avoids a chip node that is simultaneously a serial node and the
parent of serial nodes. The driver still reads chip-level RS-485 for
single-channel and legacy device trees, so existing users are unaffected.

Signed-off-by: Tapio Reijonen <tapio.reijonen@vaisala.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20260615-b4-max310x-rs485-dt-v3-2-7e79f064bdd7@vaisala.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Tapio Reijonen
2026-06-15 10:27:36 +00:00
committed by Greg Kroah-Hartman
parent 25b51d1fd3
commit f3fd73bf20

View File

@@ -9,6 +9,13 @@ title: Maxim MAX310X Advanced Universal Asynchronous Receiver-Transmitter (UART)
maintainers:
- Hugo Villeneuve <hvilleneuve@dimonoff.com>
description:
The MAX310X is a family of SPI/I2C UARTs with one (max3107, max3108),
two (max3109) or four (max14830) channels. Single-channel parts are
described as a serial node with RS-485 properties on the chip node;
multi-channel parts use one "serial@N" child node per channel, each
carrying its own serial/RS-485 properties.
properties:
compatible:
enum:
@@ -49,8 +56,55 @@ required:
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
- $ref: /schemas/serial/serial.yaml#
- $ref: /schemas/serial/rs485.yaml#
- if:
properties:
compatible:
contains:
enum:
- maxim,max3107
- maxim,max3108
then:
allOf:
- $ref: /schemas/serial/serial.yaml#
- $ref: /schemas/serial/rs485.yaml#
- if:
properties:
compatible:
contains:
enum:
- maxim,max3109
- maxim,max14830
then:
properties:
"#address-cells":
const: 1
"#size-cells":
const: 0
patternProperties:
"^serial@[0-3]$":
type: object
description: A single UART channel of the chip.
allOf:
- $ref: /schemas/serial/serial.yaml#
- $ref: /schemas/serial/rs485.yaml#
properties:
reg:
description: UART channel number on the chip.
maximum: 3
required:
- reg
unevaluatedProperties: false
- if:
properties:
compatible:
contains:
const: maxim,max3109
then:
patternProperties:
"^serial@[23]$": false
unevaluatedProperties: false
@@ -70,5 +124,39 @@ examples:
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
gpio-controller;
#gpio-cells = <2>;
rs485-rts-active-low;
linux,rs485-enabled-at-boot-time;
};
};
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
serial@0 {
compatible = "maxim,max14830";
reg = <0>;
spi-max-frequency = <26000000>;
clocks = <&xtal4m>;
clock-names = "xtal";
interrupt-parent = <&gpio3>;
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
gpio-controller;
#gpio-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
serial@0 {
reg = <0>;
rs485-rts-active-low;
linux,rs485-enabled-at-boot-time;
};
serial@2 {
reg = <2>;
rs485-rts-active-low;
};
};
};