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arm64: dts: qcom: sm6125-seine: Enable GPI DMA 0, QUP 0 and I2C SEs
Enable I2C Serial Engines 1, 2 and 3 which are known to have hardware connected to them, leaving the rest disabled to save on power. For this, only GPI DMA 0 and QUP 0 need to be enabled, as nothing seems to be connected to Serial Engines on GPU DMA 1 / QUP 1. Beyond this downstream only defines a UART console available on Serial Engine 4 which also resides on QUP 0. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Martin Botka <martin.botka@somainline.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221216233408.1283581-4-marijn.suijten@somainline.org
This commit is contained in:
committed by
Bjorn Andersson
parent
72621d0443
commit
f3b770f7a8
@@ -147,6 +147,10 @@ active-config0 {
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};
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};
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&gpi_dma0 {
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status = "okay";
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};
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&hsusb_phy1 {
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vdd-supply = <&pm6125_l7>;
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vdda-pll-supply = <&pm6125_l10>;
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@@ -154,6 +158,27 @@ &hsusb_phy1 {
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status = "okay";
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};
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&i2c1 {
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clock-frequency = <400000>;
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status = "okay";
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/* NXP PN553 NFC @ 28 */
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};
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&i2c2 {
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clock-frequency = <400000>;
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status = "okay";
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/* Samsung touchscreen @ 48 */
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};
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&i2c3 {
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clock-frequency = <1000000>;
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status = "okay";
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/* Cirrus Logic CS35L41 boosted audio amplifier @ 40 */
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};
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&pm6125_adc {
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pinctrl-names = "default";
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pinctrl-0 = <&camera_flash_therm &emmc_ufs_therm &rf_pa1_therm>;
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@@ -398,6 +423,10 @@ pm6125_l24: l24 {
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};
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};
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&qupv3_id_0 {
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status = "okay";
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};
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&sdc2_off_state {
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sd-cd-pins {
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pins = "gpio98";
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