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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-04-28 20:20:17 -04:00
Merge tag 'dt-cleanup-6.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into arm/dt
Minor improvements in ARM DTS for v6.3, part two Align UART node names and OPP table names with bindings (alpine, arm boards, axm55xx, berlin, cx92755, dm814x, moxart, mstar, stih418). * tag 'dt-cleanup-6.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: ARM: dts: berlin: align UART node name with bindings ARM: dts: stih418: align OPP table names with DT schema ARM: dts: dm814x: align UART node name with bindings ARM: dts: moxart: align UART node name with bindings ARM: dts: axm55xx: align UART node name with bindings ARM: dts: alpine: align UART node name with bindings ARM: dts: arm: align UART node name with bindings ARM: dts: cx92755: align UART node name with bindings ARM: dts: mstar: align UART node name with bindings Link: https://lore.kernel.org/r/20230129144525.5802-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
@@ -126,7 +126,7 @@ pmu {
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<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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};
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uart0: uart@fd883000 {
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uart0: serial@fd883000 {
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compatible = "ns16550a";
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reg = <0x0 0xfd883000 0x0 0x1000>;
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clock-frequency = <375000000>;
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@@ -135,7 +135,7 @@ uart0: uart@fd883000 {
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reg-io-width = <4>;
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};
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uart1: uart@fd884000 {
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uart1: serial@fd884000 {
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compatible = "ns16550a";
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reg = <0x0 0xfd884000 0x0 0x1000>;
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clock-frequency = <375000000>;
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@@ -108,7 +108,7 @@ amba {
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#size-cells = <2>;
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ranges;
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serial0: uart@2010080000 {
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serial0: serial@2010080000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x20 0x10080000 0 0x1000>;
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interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
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@@ -117,7 +117,7 @@ serial0: uart@2010080000 {
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status = "disabled";
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};
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serial1: uart@2010081000 {
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serial1: serial@2010081000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x20 0x10081000 0 0x1000>;
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interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
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@@ -126,7 +126,7 @@ serial1: uart@2010081000 {
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status = "disabled";
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};
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serial2: uart@2010082000 {
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serial2: serial@2010082000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x20 0x10082000 0 0x1000>;
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interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
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@@ -135,7 +135,7 @@ serial2: uart@2010082000 {
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status = "disabled";
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};
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serial3: uart@2010083000 {
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serial3: serial@2010083000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x20 0x10083000 0 0x1000>;
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interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
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@@ -581,7 +581,7 @@ i2c3: i2c@8000 {
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status = "disabled";
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};
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uart0: uart@9000 {
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uart0: serial@9000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x9000 0x100>;
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interrupts = <8>;
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@@ -592,7 +592,7 @@ uart0: uart@9000 {
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status = "disabled";
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};
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uart1: uart@a000 {
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uart1: serial@a000 {
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compatible = "snps,dw-apb-uart";
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reg = <0xa000 0x100>;
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interrupts = <9>;
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@@ -107,7 +107,7 @@ uc_regs: syscon@f00003a0 {
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reg = <0xf00003a0 0x10>;
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};
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uart0: uart@f0000740 {
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uart0: serial@f0000740 {
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compatible = "cnxt,cx92755-usart";
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reg = <0xf0000740 0x20>;
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clocks = <&main_clk>;
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@@ -115,7 +115,7 @@ uart0: uart@f0000740 {
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status = "disabled";
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};
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uart1: uart@f0000760 {
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uart1: serial@f0000760 {
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compatible = "cnxt,cx92755-usart";
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reg = <0xf0000760 0x20>;
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clocks = <&main_clk>;
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@@ -123,7 +123,7 @@ uart1: uart@f0000760 {
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status = "disabled";
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};
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uart2: uart@f0000780 {
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uart2: serial@f0000780 {
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compatible = "cnxt,cx92755-usart";
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reg = <0xf0000780 0x20>;
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clocks = <&main_clk>;
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@@ -333,7 +333,7 @@ timer1: timer@0 {
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};
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};
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uart1: uart@20000 {
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uart1: serial@20000 {
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compatible = "ti,am3352-uart", "ti,omap3-uart";
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ti,hwmods = "uart1";
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reg = <0x20000 0x2000>;
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@@ -343,7 +343,7 @@ uart1: uart@20000 {
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dma-names = "tx", "rx";
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};
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uart2: uart@22000 {
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uart2: serial@22000 {
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compatible = "ti,am3352-uart", "ti,omap3-uart";
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ti,hwmods = "uart2";
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reg = <0x22000 0x2000>;
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@@ -353,7 +353,7 @@ uart2: uart@22000 {
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dma-names = "tx", "rx";
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};
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uart3: uart@24000 {
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uart3: serial@24000 {
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compatible = "ti,am3352-uart", "ti,omap3-uart";
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ti,hwmods = "uart3";
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reg = <0x24000 0x2000>;
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@@ -522,7 +522,7 @@ timer7: timer@4804a000 {
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ti,timer-pwm;
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};
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uart1: uart@48020000 {
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uart1: serial@48020000 {
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compatible = "ti,am3352-uart", "ti,omap3-uart";
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ti,hwmods = "uart1";
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reg = <0x48020000 0x2000>;
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@@ -532,7 +532,7 @@ uart1: uart@48020000 {
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dma-names = "tx", "rx";
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};
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uart2: uart@48022000 {
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uart2: serial@48022000 {
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compatible = "ti,am3352-uart", "ti,omap3-uart";
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ti,hwmods = "uart2";
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reg = <0x48022000 0x2000>;
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@@ -542,7 +542,7 @@ uart2: uart@48022000 {
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dma-names = "tx", "rx";
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};
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uart3: uart@48024000 {
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uart3: serial@48024000 {
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compatible = "ti,am3352-uart", "ti,omap3-uart";
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ti,hwmods = "uart3";
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reg = <0x48024000 0x2000>;
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@@ -88,12 +88,12 @@ rtc@15000000 {
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interrupts = <8>;
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};
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uart@16000000 {
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serial@16000000 {
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reg = <0x16000000 0x1000>;
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interrupts = <1>;
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};
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uart@17000000 {
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serial@17000000 {
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reg = <0x17000000 0x1000>;
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interrupts = <2>;
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};
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@@ -162,7 +162,7 @@ vga_con_in: endpoint {
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};
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};
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uart@100000 {
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serial@100000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x00100000 0x1000>;
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interrupts-extended = <&impd1_vic 1>;
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@@ -170,7 +170,7 @@ uart@100000 {
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clock-names = "uartclk", "apb_pclk";
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};
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uart@200000 {
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serial@200000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x00200000 0x1000>;
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interrupts-extended = <&impd1_vic 2>;
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@@ -218,14 +218,14 @@ rtc: rtc@15000000 {
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clock-names = "apb_pclk";
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};
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uart0: uart@16000000 {
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uart0: serial@16000000 {
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compatible = "arm,pl010", "arm,primecell";
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arm,primecell-periphid = <0x00041010>;
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clocks = <&uartclk>, <&pclk>;
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clock-names = "uartclk", "apb_pclk";
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};
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uart1: uart@17000000 {
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uart1: serial@17000000 {
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compatible = "arm,pl010", "arm,primecell";
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arm,primecell-periphid = <0x00041010>;
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clocks = <&uartclk>, <&pclk>;
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@@ -244,13 +244,13 @@ rtc@15000000 {
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clock-names = "apb_pclk";
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};
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uart@16000000 {
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serial@16000000 {
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compatible = "arm,pl011", "arm,primecell";
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clocks = <&uartclk>, <&pclk>;
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clock-names = "uartclk", "apb_pclk";
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};
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uart@17000000 {
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serial@17000000 {
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compatible = "arm,pl011", "arm,primecell";
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clocks = <&uartclk>, <&pclk>;
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clock-names = "uartclk", "apb_pclk";
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@@ -138,7 +138,7 @@ mac1: mac@92000000 {
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status = "disabled";
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};
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uart0: uart@98200000 {
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uart0: serial@98200000 {
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compatible = "ns16550a";
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reg = <0x98200000 0x20>;
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interrupts = <31 IRQ_TYPE_LEVEL_HIGH>;
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@@ -174,7 +174,7 @@ gpio: gpio@207800 {
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status = "disabled";
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};
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pm_uart: uart@221000 {
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pm_uart: serial@221000 {
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compatible = "ns16550a";
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reg = <0x221000 0x100>;
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reg-shift = <3>;
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@@ -42,7 +42,7 @@ cpu@3 {
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};
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};
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cpu_opp_table: opp_table {
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cpu_opp_table: opp-table {
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compatible = "operating-points-v2";
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opp-shared;
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@@ -237,7 +237,7 @@ dma@10130000 {
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clock-names = "apb_pclk";
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};
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uart0: uart@101f1000 {
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uart0: serial@101f1000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x101f1000 0x1000>;
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interrupts = <12>;
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@@ -245,7 +245,7 @@ uart0: uart@101f1000 {
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clock-names = "uartclk", "apb_pclk";
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};
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uart1: uart@101f2000 {
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uart1: serial@101f2000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x101f2000 0x1000>;
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interrupts = <13>;
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@@ -253,7 +253,7 @@ uart1: uart@101f2000 {
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clock-names = "uartclk", "apb_pclk";
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};
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uart2: uart@101f3000 {
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uart2: serial@101f3000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x101f3000 0x1000>;
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interrupts = <14>;
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@@ -85,7 +85,7 @@ mmc@5000 {
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*/
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interrupts-extended = <&sic 22 &sic 23>;
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};
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uart@9000 {
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serial@9000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x9000 0x1000>;
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interrupt-parent = <&sic>;
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@@ -216,7 +216,7 @@ kmi@7000 {
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clock-names = "KMIREFCLK", "apb_pclk";
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};
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v2m_serial0: uart@9000 {
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v2m_serial0: serial@9000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x09000 0x1000>;
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interrupts = <5>;
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@@ -224,7 +224,7 @@ v2m_serial0: uart@9000 {
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clock-names = "uartclk", "apb_pclk";
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};
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v2m_serial1: uart@a000 {
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v2m_serial1: serial@a000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x0a000 0x1000>;
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interrupts = <6>;
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@@ -232,7 +232,7 @@ v2m_serial1: uart@a000 {
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clock-names = "uartclk", "apb_pclk";
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};
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v2m_serial2: uart@b000 {
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v2m_serial2: serial@b000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x0b000 0x1000>;
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interrupts = <7>;
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@@ -240,7 +240,7 @@ v2m_serial2: uart@b000 {
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clock-names = "uartclk", "apb_pclk";
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};
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v2m_serial3: uart@c000 {
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v2m_serial3: serial@c000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x0c000 0x1000>;
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interrupts = <8>;
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