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drm/i915/fbc: No surface size restrictions from LNL onwards

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From xe2_lpd+ platforms, enabling FBC do not depend on the
surface size. So remove the check.

v2: changes to patch description

Bspec: 69560
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patch.msgid.link/20260722132448.318112-3-vinod.govindapillai@intel.com
This commit is contained in:
Vinod Govindapillai
2026-07-22 16:24:48 +03:00
parent 8e58bdd595
commit f0cabcc880
1 changed files with 3 additions and 0 deletions
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drivers/gpu/drm/i915/display/intel_fbc.c
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@@ -1306,6 +1306,9 @@ static bool intel_fbc_surface_size_ok(const struct intel_plane_state *plane_stat
struct intel_display *display = to_intel_display(plane_state);
unsigned int effective_w, effective_h, max_w, max_h;
if (DISPLAY_VER(display) >= 20)
return true;
intel_fbc_max_surface_size(display, &max_w, &max_h);
effective_w = plane_state->view.color_plane[0].x +