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drm/amd/display: prevent seamless boot on displays that don't have the preferred dig

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Seamless boot requires VBIOS to select dig matching to link order wise. A significant
amount of dal logic makes assumption we are using preferred dig for eDP and if this
isn't the case then seamless boot is not supported.

Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dmytro Laktyushkin
2022-11-21 15:29:35 -05:00
committed by Alex Deucher
parent 5f9f97c02d
commit f0882d3afb
1 changed files with 3 additions and 0 deletions
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3
drivers/gpu/drm/amd/display/dc/core/dc.c
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@@ -1556,6 +1556,9 @@ bool dc_validate_boot_timing(const struct dc *dc,
if (tg_inst >= dc->res_pool->timing_generator_count)
return false;
if (tg_inst != link->link_enc->preferred_engine)
return false;
tg = dc->res_pool->timing_generators[tg_inst];
if (!tg->funcs->get_hw_timing)