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perf vendor events: Update icelakex to v1.20

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Update from v1.19 to v1.20 affecting the uncore
UNC_CHA_CORE_SNP.REMOTE_GTONE event's umask.

Signed-off-by: Ian Rogers <irogers@google.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com>
Link: https://lore.kernel.org/r/20230411234440.3313680-2-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Ian Rogers
2023-04-11 16:44:39 -07:00
committed by Arnaldo Carvalho de Melo
parent 588c8a2da9
commit f00e589228
2 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
tools/perf/pmu-events/arch/x86/icelakex/uncore-other.json
View File

@@ -981,7 +981,7 @@
"EventName": "UNC_CHA_CORE_SNP.REMOTE_GTONE",
"PerPkg": "1",
"PublicDescription": "Core Cross Snoops Issued : Multiple Snoop Targets from Remote : Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop(s).",
"UMask": "0x22",
"UMask": "0x12",
"Unit": "CHA"
},
{

2
tools/perf/pmu-events/arch/x86/mapfile.csv
View File

@@ -13,7 +13,7 @@ GenuineIntel-6-A[DE],v1.01,graniterapids,core
GenuineIntel-6-(3C|45|46),v33,haswell,core
GenuineIntel-6-3F,v27,haswellx,core
GenuineIntel-6-(7D|7E|A7),v1.17,icelake,core
GenuineIntel-6-6[AC],v1.19,icelakex,core
GenuineIntel-6-6[AC],v1.20,icelakex,core
GenuineIntel-6-3A,v24,ivybridge,core
GenuineIntel-6-3E,v23,ivytown,core
GenuineIntel-6-2D,v23,jaketown,core
1 Family-model Version Filename EventType
13 GenuineIntel-6-(3C|45|46) v33 haswell core
14 GenuineIntel-6-3F v27 haswellx core
15 GenuineIntel-6-(7D|7E|A7) v1.17 icelake core
16 GenuineIntel-6-6[AC] v1.19 v1.20 icelakex core
17 GenuineIntel-6-3A v24 ivybridge core
18 GenuineIntel-6-3E v23 ivytown core
19 GenuineIntel-6-2D v23 jaketown core