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drm/xe: Consolidate workaround entries for Wa_18041344222

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Wa_18041344222 applies to all graphics versions from 20.01 through 30.00
(inclusive).  Consolidate the RTP entries into a single range-based
entry.

v2:
 - Drop the FUNC(xe_rtp_match_not_sriov_vf) to align with commit
   a800b95c24 ("drm/xe/xe2hpg: Remove SRIOV VF check for
   Wa_18041344222") and commit 0ffe9dcf26 ("drm/xe/xe3: Remove SRIOV
   VF check for Wa_18041344222") which just landed.  (Shuicheng)

Cc: Shuicheng Lin <shuicheng.lin@intel.com>
Reviewed-by: Shuicheng Lin <shuicheng.lin@intel.com>
Link: https://patch.msgid.link/20260223-forupstream-wa_cleanup-v3-1-7f201eb2f172@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
This commit is contained in:
Matt Roper
2026-02-23 16:11:32 -08:00
parent 369cc88049
commit ef547cf1b8
1 changed files with 6 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
drivers/gpu/drm/xe/xe_wa.c
View File

@@ -385,6 +385,12 @@ static const struct xe_rtp_entry_sr engine_was[] = {
FUNC(xe_rtp_match_first_render_or_compute)),
XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
},
{ XE_RTP_NAME("18041344222"),
XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 3000),
FUNC(xe_rtp_match_first_render_or_compute),
FUNC(xe_rtp_match_gt_has_discontiguous_dss_groups)),
XE_RTP_ACTIONS(SET(TDL_CHICKEN, EUSTALL_PERF_SAMPLING_DISABLE))
},
/* TGL */
@@ -531,12 +537,6 @@ static const struct xe_rtp_entry_sr engine_was[] = {
XE_RTP_RULES(GRAPHICS_VERSION(2004), FUNC(xe_rtp_match_first_render_or_compute)),
XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, SLM_WMTP_RESTORE))
},
{ XE_RTP_NAME("18041344222"),
XE_RTP_RULES(GRAPHICS_VERSION(2004),
FUNC(xe_rtp_match_first_render_or_compute),
FUNC(xe_rtp_match_gt_has_discontiguous_dss_groups)),
XE_RTP_ACTIONS(SET(TDL_CHICKEN, EUSTALL_PERF_SAMPLING_DISABLE))
},
/* Xe2_HPG */
@@ -555,12 +555,6 @@ static const struct xe_rtp_entry_sr engine_was[] = {
FUNC(xe_rtp_match_first_render_or_compute)),
XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, STK_ID_RESTRICT))
},
{ XE_RTP_NAME("18041344222"),
XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
FUNC(xe_rtp_match_first_render_or_compute),
FUNC(xe_rtp_match_gt_has_discontiguous_dss_groups)),
XE_RTP_ACTIONS(SET(TDL_CHICKEN, EUSTALL_PERF_SAMPLING_DISABLE))
},
/* Xe3_LPG */
@@ -586,12 +580,6 @@ static const struct xe_rtp_entry_sr engine_was[] = {
XE_RTP_ACTIONS(SET(RING_PSMI_CTL(0), RC_SEMA_IDLE_MSG_DISABLE,
XE_RTP_ACTION_FLAG(ENGINE_BASE)))
},
{ XE_RTP_NAME("18041344222"),
XE_RTP_RULES(GRAPHICS_VERSION(3000),
FUNC(xe_rtp_match_first_render_or_compute),
FUNC(xe_rtp_match_gt_has_discontiguous_dss_groups)),
XE_RTP_ACTIONS(SET(TDL_CHICKEN, EUSTALL_PERF_SAMPLING_DISABLE))
},
/* Xe3p_LPG*/