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drm/amdgpu: correct IH_CHICKEN programming for aldebaran

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For aldebaran, psp firmware won't program IH_CHICKEN.
it now depends on driver to program it properly so
either bus address or gpu virtual address is just
working for ih ring.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Dennis Li <Dennis.Li@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Hawking Zhang
2020-12-01 23:50:51 +08:00
committed by Alex Deucher
parent b45589b837
commit eed4bbd388
1 changed files with 15 additions and 0 deletions
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15
drivers/gpu/drm/amd/amdgpu/vega20_ih.c
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@@ -35,6 +35,9 @@
#define MAX_REARM_RETRY 10
#define mmIH_CHICKEN_ALDEBARAN 0x18d
#define mmIH_CHICKEN_ALDEBARAN_BASE_IDX 0
static void vega20_ih_set_interrupt_funcs(struct amdgpu_device *adev);
/**
@@ -316,6 +319,18 @@ static int vega20_ih_irq_init(struct amdgpu_device *adev)
WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN, ih_chicken);
}
/* psp firmware won't program IH_CHICKEN for aldebaran
* driver needs to program it properly according to
* MC_SPACE type in IH_RB_CNTL */
if (adev->asic_type == CHIP_ALDEBARAN) {
ih_chicken = RREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN_ALDEBARAN);
if (adev->irq.ih.use_bus_addr) {
ih_chicken = REG_SET_FIELD(ih_chicken, IH_CHICKEN,
MC_SPACE_GPA_ENABLE, 1);
}
WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN_ALDEBARAN, ih_chicken);
}
for (i = 0; i < ARRAY_SIZE(ih); i++) {
if (ih[i]->ring_size) {
if (i == 1)