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arm64: dts: qcom: sc7280: Add WSA SoundWire and LPASS support
Add WSA LPASS macro Codec along with SoundWire controller. Co-developed-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250903151337.1037246-4-mohammad.rafi.shaik@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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committed by
Bjorn Andersson
parent
7c6de75111
commit
eec852a4c8
@@ -28,6 +28,7 @@
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#include <dt-bindings/soc/qcom,apr.h>
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#include <dt-bindings/soc/qcom,rpmh-rsc.h>
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#include <dt-bindings/sound/qcom,lpass.h>
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#include <dt-bindings/sound/qcom,q6afe.h>
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#include <dt-bindings/sound/qcom,q6asm.h>
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#include <dt-bindings/thermal/thermal.h>
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@@ -2773,6 +2774,66 @@ swr1: soundwire@3230000 {
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status = "disabled";
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};
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lpass_wsa_macro: codec@3240000 {
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compatible = "qcom,sc7280-lpass-wsa-macro";
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reg = <0x0 0x03240000 0x0 0x1000>;
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clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
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<&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
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<&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
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<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
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<&lpass_va_macro>;
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clock-names = "mclk",
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"npl",
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"macro",
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"dcodec",
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"fsgen";
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pinctrl-0 = <&lpass_wsa_swr_clk>, <&lpass_wsa_swr_data>;
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pinctrl-names = "default";
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#clock-cells = <0>;
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clock-output-names = "mclk";
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#sound-dai-cells = <1>;
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status = "disabled";
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};
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swr2: soundwire@3250000 {
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compatible = "qcom,soundwire-v1.6.0";
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reg = <0x0 0x03250000 0x0 0x2000>;
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interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&lpass_wsa_macro>;
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clock-names = "iface";
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resets = <&lpass_audiocc LPASS_AUDIO_SWR_WSA_CGCR>;
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reset-names = "swr_audio_cgcr";
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qcom,din-ports = <2>;
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qcom,dout-ports = <6>;
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qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x07
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0x1f 0x3f 0x0f 0x0f>;
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qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x06 0x12 0x0d 0x07 0x0a>;
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qcom,ports-offset2 = /bits/ 8 <0xff 0x00 0x1f 0xff 0x00 0x1f 0x00 0x00>;
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qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
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qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
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qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
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qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0x01 0xff 0xff 0x01
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0xff 0xff>;
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qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff
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0xff 0xff>;
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qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff
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0xff 0xff>;
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#address-cells = <2>;
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#size-cells = <0>;
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#sound-dai-cells = <1>;
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status = "disabled";
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};
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lpass_audiocc: clock-controller@3300000 {
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compatible = "qcom,sc7280-lpassaudiocc";
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reg = <0 0x03300000 0 0x30000>,
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@@ -2976,6 +3037,22 @@ lpass_tx_swr_data: tx-swr-data-state {
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pins = "gpio1", "gpio2", "gpio14";
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function = "swr_tx_data";
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};
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lpass_wsa_swr_clk: wsa-swr-clk-state {
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pins = "gpio10";
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function = "wsa_swr_clk";
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drive-strength = <2>;
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slew-rate = <1>;
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bias-disable;
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};
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lpass_wsa_swr_data: wsa-swr-data-state {
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pins = "gpio11";
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function = "wsa_swr_data";
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drive-strength = <2>;
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slew-rate = <1>;
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bias-bus-hold;
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};
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};
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gpu: gpu@3d00000 {
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