arm64: dts: qcom: sc7280: Add WSA SoundWire and LPASS support

Add WSA LPASS macro Codec along with SoundWire controller.

Co-developed-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250903151337.1037246-4-mohammad.rafi.shaik@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Mohammad Rafi Shaik
2025-09-03 20:43:32 +05:30
committed by Bjorn Andersson
parent 7c6de75111
commit eec852a4c8

View File

@@ -28,6 +28,7 @@
#include <dt-bindings/soc/qcom,apr.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/sound/qcom,lpass.h>
#include <dt-bindings/sound/qcom,q6afe.h>
#include <dt-bindings/sound/qcom,q6asm.h>
#include <dt-bindings/thermal/thermal.h>
@@ -2773,6 +2774,66 @@ swr1: soundwire@3230000 {
status = "disabled";
};
lpass_wsa_macro: codec@3240000 {
compatible = "qcom,sc7280-lpass-wsa-macro";
reg = <0x0 0x03240000 0x0 0x1000>;
clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
<&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
<&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&lpass_va_macro>;
clock-names = "mclk",
"npl",
"macro",
"dcodec",
"fsgen";
pinctrl-0 = <&lpass_wsa_swr_clk>, <&lpass_wsa_swr_data>;
pinctrl-names = "default";
#clock-cells = <0>;
clock-output-names = "mclk";
#sound-dai-cells = <1>;
status = "disabled";
};
swr2: soundwire@3250000 {
compatible = "qcom,soundwire-v1.6.0";
reg = <0x0 0x03250000 0x0 0x2000>;
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&lpass_wsa_macro>;
clock-names = "iface";
resets = <&lpass_audiocc LPASS_AUDIO_SWR_WSA_CGCR>;
reset-names = "swr_audio_cgcr";
qcom,din-ports = <2>;
qcom,dout-ports = <6>;
qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x07
0x1f 0x3f 0x0f 0x0f>;
qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x06 0x12 0x0d 0x07 0x0a>;
qcom,ports-offset2 = /bits/ 8 <0xff 0x00 0x1f 0xff 0x00 0x1f 0x00 0x00>;
qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0x01 0xff 0xff 0x01
0xff 0xff>;
qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff
0xff 0xff>;
qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff
0xff 0xff>;
#address-cells = <2>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "disabled";
};
lpass_audiocc: clock-controller@3300000 {
compatible = "qcom,sc7280-lpassaudiocc";
reg = <0 0x03300000 0 0x30000>,
@@ -2976,6 +3037,22 @@ lpass_tx_swr_data: tx-swr-data-state {
pins = "gpio1", "gpio2", "gpio14";
function = "swr_tx_data";
};
lpass_wsa_swr_clk: wsa-swr-clk-state {
pins = "gpio10";
function = "wsa_swr_clk";
drive-strength = <2>;
slew-rate = <1>;
bias-disable;
};
lpass_wsa_swr_data: wsa-swr-data-state {
pins = "gpio11";
function = "wsa_swr_data";
drive-strength = <2>;
slew-rate = <1>;
bias-bus-hold;
};
};
gpu: gpu@3d00000 {