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Merge tag 'at91-dt-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt

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AT91 DT for 6.5 #2

It contains:
- generic names for shutdown controller nodes
- enablement of DT overlay support for some AT91 boards
- fix reset and SPI CS for lan966x-kontron-kswitch-d10-mmt based boards
- addition of PHY interrupts for lan966x-kontron-kswitch-d10-mmt-8g
  board

* tag 'at91-dt-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: lan966x: kontron-d10: add PHY interrupts
  ARM: dts: lan966x: kontron-d10: fix SPI CS
  ARM: dts: lan966x: kontron-d10: fix board reset
  ARM: dts: at91: Enable device-tree overlay support for AT91 boards
  ARM: dts: at91: use generic name for shutdown controller

Link: https://lore.kernel.org/r/20230621093853.1575312-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2023-06-21 15:15:10 +02:00
parent d8ece8b832 33c01ff3b1
commit ee44484c12
22 changed files with 50 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/at91-qil_a9260.dts
View File

@@ -108,7 +108,7 @@ dbgu: serial@fffff200 {
status = "okay";
};
shdwc@fffffd10 {
shdwc: poweroff@fffffd10 {
atmel,wakeup-counter = <10>;
atmel,wakeup-rtt-timer;
};

2
arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
View File

@@ -139,7 +139,7 @@ i2c3: i2c@600 {
};
};
shdwc@f8048010 {
poweroff@f8048010 {
debounce-delay-us = <976>;
atmel,wakeup-rtc-timer;

2
arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts
View File

@@ -204,7 +204,7 @@ i2c2: i2c@600 {
};
};
shdwc@f8048010 {
poweroff@f8048010 {
debounce-delay-us = <976>;
input@0 {

2
arch/arm/boot/dts/at91-sama5d2_xplained.dts
View File

@@ -348,7 +348,7 @@ i2c2: i2c@600 {
};
};
shdwc@f8048010 {
poweroff@f8048010 {
debounce-delay-us = <976>;
atmel,wakeup-rtc-timer;

2
arch/arm/boot/dts/at91sam9260.dtsi
View File

@@ -130,7 +130,7 @@ reset-controller@fffffd00 {
clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
};
shdwc@fffffd10 {
shdwc: poweroff@fffffd10 {
compatible = "atmel,at91sam9260-shdwc";
reg = <0xfffffd10 0x10>;
clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;

2
arch/arm/boot/dts/at91sam9260ek.dts
View File

@@ -112,7 +112,7 @@ pinctrl_board_mmc0_slot1: mmc0_slot1-board {
};
};
shdwc@fffffd10 {
shdwc: poweroff@fffffd10 {
atmel,wakeup-counter = <10>;
atmel,wakeup-rtt-timer;
};

2
arch/arm/boot/dts/at91sam9261.dtsi
View File

@@ -614,7 +614,7 @@ reset-controller@fffffd00 {
clocks = <&slow_xtal>;
};
shdwc@fffffd10 {
poweroff@fffffd10 {
compatible = "atmel,at91sam9260-shdwc";
reg = <0xfffffd10 0x10>;
clocks = <&slow_xtal>;

2
arch/arm/boot/dts/at91sam9263.dtsi
View File

@@ -158,7 +158,7 @@ reset-controller@fffffd00 {
clocks = <&slow_xtal>;
};
shdwc@fffffd10 {
poweroff@fffffd10 {
compatible = "atmel,at91sam9260-shdwc";
reg = <0xfffffd10 0x10>;
clocks = <&slow_xtal>;

2
arch/arm/boot/dts/at91sam9g20ek_common.dtsi
View File

@@ -126,7 +126,7 @@ flash@1 {
};
};
shdwc@fffffd10 {
shdwc: poweroff@fffffd10 {
atmel,wakeup-counter = <10>;
atmel,wakeup-rtt-timer;
};

2
arch/arm/boot/dts/at91sam9g45.dtsi
View File

@@ -152,7 +152,7 @@ pit: timer@fffffd30 {
};
shdwc@fffffd10 {
poweroff@fffffd10 {
compatible = "atmel,at91sam9rl-shdwc";
reg = <0xfffffd10 0x10>;
clocks = <&clk32k>;

2
arch/arm/boot/dts/at91sam9n12.dtsi
View File

@@ -140,7 +140,7 @@ pit: timer@fffffe30 {
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
};
shdwc@fffffe10 {
poweroff@fffffe10 {
compatible = "atmel,at91sam9x5-shdwc";
reg = <0xfffffe10 0x10>;
clocks = <&clk32k>;

2
arch/arm/boot/dts/at91sam9rl.dtsi
View File

@@ -778,7 +778,7 @@ reset-controller@fffffd00 {
clocks = <&clk32k>;
};
shdwc@fffffd10 {
poweroff@fffffd10 {
compatible = "atmel,at91sam9260-shdwc";
reg = <0xfffffd10 0x10>;
clocks = <&clk32k>;

2
arch/arm/boot/dts/at91sam9x5.dtsi
View File

@@ -141,7 +141,7 @@ reset_controller: reset-controller@fffffe00 {
clocks = <&clk32k>;
};
shutdown_controller: shdwc@fffffe10 {
shutdown_controller: poweroff@fffffe10 {
compatible = "atmel,at91sam9x5-shdwc";
reg = <0xfffffe10 0x10>;
clocks = <&clk32k>;

2
arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt-8g.dts
View File

@@ -15,10 +15,12 @@ / {
&mdio0 {
phy2: ethernet-phy@3 {
reg = <3>;
interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
};
phy3: ethernet-phy@4 {
reg = <4>;
interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
};
};

29
arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi
View File

@@ -18,6 +18,8 @@ chosen {
gpio-restart {
compatible = "gpio-restart";
pinctrl-0 = <&reset_pins>;
pinctrl-names = "default";
gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
priority = <200>;
};
@@ -39,7 +41,7 @@ &flx3 {
status = "okay";
spi3: spi@400 {
pinctrl-0 = <&fc3_b_pins>;
pinctrl-0 = <&fc3_b_pins>, <&spi3_cs_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
@@ -47,6 +49,9 @@ spi3: spi@400 {
};
&gpio {
pinctrl-0 = <&phy_int_pins>;
pinctrl-names = "default";
fc3_b_pins: fc3-b-pins {
/* SCK, MISO, MOSI */
pins = "GPIO_51", "GPIO_52", "GPIO_53";
@@ -59,6 +64,18 @@ miim_c_pins: miim-c-pins {
function = "miim_c";
};
phy_int_pins: phy-int-pins {
/* PHY_INT# */
pins = "GPIO_24";
function = "gpio";
};
reset_pins: reset-pins {
/* SYS_RST# */
pins = "GPIO_56";
function = "gpio";
};
sgpio_a_pins: sgpio-a-pins {
/* SCK, D0, D1 */
pins = "GPIO_32", "GPIO_33", "GPIO_34";
@@ -71,6 +88,12 @@ sgpio_b_pins: sgpio-b-pins {
function = "sgpio_b";
};
spi3_cs_pins: spi3-cs-pins {
/* CS# */
pins = "GPIO_46";
function = "gpio";
};
usart0_pins: usart0-pins {
/* RXD, TXD */
pins = "GPIO_25", "GPIO_26";
@@ -93,21 +116,25 @@ &mdio0 {
phy4: ethernet-phy@5 {
reg = <5>;
interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
};
phy5: ethernet-phy@6 {
reg = <6>;
interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
};
phy6: ethernet-phy@7 {
reg = <7>;
interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
};
phy7: ethernet-phy@8 {
reg = <8>;
interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
};
};

2
arch/arm/boot/dts/sam9x60.dtsi
View File

@@ -1297,7 +1297,7 @@ reset_controller: reset-controller@fffffe00 {
clocks = <&clk32k 0>;
};
shutdown_controller: shdwc@fffffe10 {
shutdown_controller: poweroff@fffffe10 {
compatible = "microchip,sam9x60-shdwc";
reg = <0xfffffe10 0x10>;
clocks = <&clk32k 0>;

2
arch/arm/boot/dts/sama5d2.dtsi
View File

@@ -680,7 +680,7 @@ reset_controller: reset-controller@f8048000 {
clocks = <&clk32k>;
};
shutdown_controller: shdwc@f8048010 {
shutdown_controller: poweroff@f8048010 {
compatible = "atmel,sama5d2-shdwc";
reg = <0xf8048010 0x10>;
clocks = <&clk32k>;

2
arch/arm/boot/dts/sama5d3.dtsi
View File

@@ -1016,7 +1016,7 @@ reset_controller: reset-controller@fffffe00 {
clocks = <&clk32k>;
};
shutdown_controller: shutdown-controller@fffffe10 {
shutdown_controller: poweroff@fffffe10 {
compatible = "atmel,at91sam9x5-shdwc";
reg = <0xfffffe10 0x10>;
clocks = <&clk32k>;

2
arch/arm/boot/dts/sama5d4.dtsi
View File

@@ -740,7 +740,7 @@ reset_controller: reset-controller@fc068600 {
clocks = <&clk32k>;
};
shutdown_controller: shdwc@fc068610 {
shutdown_controller: poweroff@fc068610 {
compatible = "atmel,at91sam9x5-shdwc";
reg = <0xfc068610 0x10>;
clocks = <&clk32k>;

2
arch/arm/boot/dts/sama7g5.dtsi
View File

@@ -257,7 +257,7 @@ reset_controller: reset-controller@e001d000 {
clocks = <&clk32k 0>;
};
shdwc: shdwc@e001d010 {
shdwc: poweroff@e001d010 {
compatible = "microchip,sama7g5-shdwc", "syscon";
reg = <0xe001d010 0x10>;
clocks = <&clk32k 0>;

2
arch/arm/boot/dts/usb_a9260.dts
View File

@@ -22,7 +22,7 @@ memory@20000000 {
ahb {
apb {
shdwc@fffffd10 {
shdwc: poweroff@fffffd10 {
atmel,wakeup-counter = <10>;
atmel,wakeup-rtt-timer;
};

2
arch/arm/boot/dts/usb_a9263.dts
View File

@@ -67,7 +67,7 @@ flash@0 {
};
};
shdwc@fffffd10 {
poweroff@fffffd10 {
atmel,wakeup-counter = <10>;
atmel,wakeup-rtt-timer;
};