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staging: comedi: ni_stc.h: rename the NI-6143 register defines

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Rename the CamelCase.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten
2015-05-01 15:00:08 -07:00
committed by Greg Kroah-Hartman
parent 0418da5137
commit ee3e21ac4b
3 changed files with 65 additions and 62 deletions
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54
drivers/staging/comedi/drivers/ni_mio_common.c
View File

@@ -843,11 +843,11 @@ static void ni_clear_ai_fifo(struct comedi_device *dev)
if (devpriv->is_6143) {
/* Flush the 6143 data FIFO */
ni_writel(dev, 0x10, AIFIFO_Control_6143);
ni_writel(dev, 0x00, AIFIFO_Control_6143);
ni_writel(dev, 0x10, NI6143_AI_FIFO_CTRL_REG);
ni_writel(dev, 0x00, NI6143_AI_FIFO_CTRL_REG);
/* Wait for complete */
for (i = 0; i < timeout; i++) {
if (!(ni_readl(dev, AIFIFO_Status_6143) & 0x10))
if (!(ni_readl(dev, NI6143_AI_FIFO_STATUS_REG) & 0x10))
break;
udelay(1);
}
@@ -1134,7 +1134,7 @@ static void ni_ai_fifo_read(struct comedi_device *dev,
} else if (devpriv->is_6143) {
/* This just reads the FIFO assuming the data is present, no checks on the FIFO status are performed */
for (i = 0; i < n / 2; i++) {
dl = ni_readl(dev, AIFIFO_Data_6143);
dl = ni_readl(dev, NI6143_AI_FIFO_DATA_REG);
data = (dl >> 16) & 0xffff;
comedi_buf_write_samples(s, &data, 1);
@@ -1144,8 +1144,8 @@ static void ni_ai_fifo_read(struct comedi_device *dev,
if (n % 2) {
/* Assume there is a single sample stuck in the FIFO */
/* Get stranded sample into FIFO */
ni_writel(dev, 0x01, AIFIFO_Control_6143);
dl = ni_readl(dev, AIFIFO_Data_6143);
ni_writel(dev, 0x01, NI6143_AI_FIFO_CTRL_REG);
dl = ni_readl(dev, NI6143_AI_FIFO_DATA_REG);
data = (dl >> 16) & 0xffff;
comedi_buf_write_samples(s, &data, 1);
}
@@ -1202,8 +1202,8 @@ static void ni_handle_fifo_dregs(struct comedi_device *dev)
}
} else if (devpriv->is_6143) {
i = 0;
while (ni_readl(dev, AIFIFO_Status_6143) & 0x04) {
dl = ni_readl(dev, AIFIFO_Data_6143);
while (ni_readl(dev, NI6143_AI_FIFO_STATUS_REG) & 0x04) {
dl = ni_readl(dev, NI6143_AI_FIFO_DATA_REG);
/* This may get the hi/lo data in the wrong order */
data = dl >> 16;
@@ -1213,10 +1213,10 @@ static void ni_handle_fifo_dregs(struct comedi_device *dev)
i += 2;
}
/* Check if stranded sample is present */
if (ni_readl(dev, AIFIFO_Status_6143) & 0x01) {
if (ni_readl(dev, NI6143_AI_FIFO_STATUS_REG) & 0x01) {
/* Get stranded sample into FIFO */
ni_writel(dev, 0x01, AIFIFO_Control_6143);
dl = ni_readl(dev, AIFIFO_Data_6143);
ni_writel(dev, 0x01, NI6143_AI_FIFO_CTRL_REG);
dl = ni_readl(dev, NI6143_AI_FIFO_DATA_REG);
data = (dl >> 16) & 0xffff;
comedi_buf_write_samples(s, &data, 1);
}
@@ -1271,10 +1271,10 @@ static void get_last_sample_6143(struct comedi_device *dev)
return;
/* Check if there's a single sample stuck in the FIFO */
if (ni_readl(dev, AIFIFO_Status_6143) & 0x01) {
if (ni_readl(dev, NI6143_AI_FIFO_STATUS_REG) & 0x01) {
/* Get stranded sample into FIFO */
ni_writel(dev, 0x01, AIFIFO_Control_6143);
dl = ni_readl(dev, AIFIFO_Data_6143);
ni_writel(dev, 0x01, NI6143_AI_FIFO_CTRL_REG);
dl = ni_readl(dev, NI6143_AI_FIFO_DATA_REG);
/* This may get the hi/lo data in the wrong order */
data = (dl >> 16) & 0xffff;
@@ -1843,20 +1843,20 @@ static void ni_load_channelgain_list(struct comedi_device *dev,
&& !devpriv->ai_calib_source_enabled) {
/* Strobe Relay enable bit */
ni_writew(dev, devpriv->ai_calib_source |
Calibration_Channel_6143_RelayOn,
Calibration_Channel_6143);
NI6143_CALIB_CHAN_RELAY_ON,
NI6143_CALIB_CHAN_REG);
ni_writew(dev, devpriv->ai_calib_source,
Calibration_Channel_6143);
NI6143_CALIB_CHAN_REG);
devpriv->ai_calib_source_enabled = 1;
msleep_interruptible(100); /* Allow relays to change */
} else if (!(list[0] & CR_ALT_SOURCE)
&& devpriv->ai_calib_source_enabled) {
/* Strobe Relay disable bit */
ni_writew(dev, devpriv->ai_calib_source |
Calibration_Channel_6143_RelayOff,
Calibration_Channel_6143);
NI6143_CALIB_CHAN_RELAY_OFF,
NI6143_CALIB_CHAN_REG);
ni_writew(dev, devpriv->ai_calib_source,
Calibration_Channel_6143);
NI6143_CALIB_CHAN_REG);
devpriv->ai_calib_source_enabled = 0;
msleep_interruptible(100); /* Allow relays to change */
}
@@ -1982,11 +1982,13 @@ static int ni_ai_insn_read(struct comedi_device *dev,
/* The 6143 has 32-bit FIFOs. You need to strobe a bit to move a single 16bit stranded sample into the FIFO */
dl = 0;
for (i = 0; i < NI_TIMEOUT; i++) {
if (ni_readl(dev, AIFIFO_Status_6143) & 0x01) {
if (ni_readl(dev, NI6143_AI_FIFO_STATUS_REG) &
0x01) {
/* Get stranded sample into FIFO */
ni_writel(dev, 0x01,
AIFIFO_Control_6143);
dl = ni_readl(dev, AIFIFO_Data_6143);
NI6143_AI_FIFO_CTRL_REG);
dl = ni_readl(dev,
NI6143_AI_FIFO_DATA_REG);
break;
}
}
@@ -2541,7 +2543,7 @@ static int ni_ai_insn_config(struct comedi_device *dev,
calib_source = data[1] & 0xf;
devpriv->ai_calib_source = calib_source;
ni_writew(dev, calib_source, Calibration_Channel_6143);
ni_writew(dev, calib_source, NI6143_CALIB_CHAN_REG);
} else {
unsigned int calib_source;
unsigned int calib_source_adjust;
@@ -4055,9 +4057,9 @@ static int ni_6143_pwm_config(struct comedi_device *dev,
data[4] = down_count * devpriv->clock_ns;
return -EAGAIN;
}
ni_writel(dev, up_count, Calibration_HighTime_6143);
ni_writel(dev, up_count, NI6143_CALIB_HI_TIME_REG);
devpriv->pwm_up_count = up_count;
ni_writel(dev, down_count, Calibration_LowTime_6143);
ni_writel(dev, down_count, NI6143_CALIB_LO_TIME_REG);
devpriv->pwm_down_count = down_count;
return 5;
case INSN_CONFIG_GET_PWM_OUTPUT:

15
drivers/staging/comedi/drivers/ni_pcimio.c
View File

@@ -1090,21 +1090,20 @@ static void init_6143(struct comedi_device *dev)
/* Initialise 6143 AI specific bits */
/* Set G0,G1 DMA mode to E series version */
ni_writeb(dev, 0x00, Magic_6143);
ni_writeb(dev, 0x00, NI6143_MAGIC_REG);
/* Set EOCMode, ADCMode and pipelinedelay */
ni_writeb(dev, 0x80, PipelineDelay_6143);
ni_writeb(dev, 0x80, NI6143_PIPELINE_DELAY_REG);
/* Set EOC Delay */
ni_writeb(dev, 0x00, EOC_Set_6143);
ni_writeb(dev, 0x00, NI6143_EOC_SET_REG);
/* Set the FIFO half full level */
ni_writel(dev, board->ai_fifo_depth / 2, AIFIFO_Flag_6143);
ni_writel(dev, board->ai_fifo_depth / 2, NI6143_AI_FIFO_FLAG_REG);
/* Strobe Relay disable bit */
devpriv->ai_calib_source_enabled = 0;
ni_writew(dev, devpriv->ai_calib_source |
Calibration_Channel_6143_RelayOff,
Calibration_Channel_6143);
ni_writew(dev, devpriv->ai_calib_source, Calibration_Channel_6143);
ni_writew(dev, devpriv->ai_calib_source | NI6143_CALIB_CHAN_RELAY_OFF,
NI6143_CALIB_CHAN_REG);
ni_writew(dev, devpriv->ai_calib_source, NI6143_CALIB_CHAN_REG);
}
static void pcimio_detach(struct comedi_device *dev)

58
drivers/staging/comedi/drivers/ni_stc.h
View File

@@ -618,35 +618,37 @@
#define NI611X_AO_WINDOW_ADDR_REG 0x18
#define NI611X_AO_WINDOW_DATA_REG 0x1e
/* 6143 registers */
#define Magic_6143 0x19 /* w8 */
#define G0G1_DMA_Select_6143 0x0B /* w8 */
#define PipelineDelay_6143 0x1f /* w8 */
#define EOC_Set_6143 0x1D /* w8 */
#define AIDMA_Select_6143 0x09 /* w8 */
#define AIFIFO_Data_6143 0x8C /* w32 */
#define AIFIFO_Flag_6143 0x84 /* w32 */
#define AIFIFO_Control_6143 0x88 /* w32 */
#define AIFIFO_Status_6143 0x88 /* w32 */
#define AIFIFO_DMAThreshold_6143 0x90 /* w32 */
#define AIFIFO_Words_Available_6143 0x94 /* w32 */
/*
* 6143 registers
*/
#define NI6143_MAGIC_REG 0x19 /* w8 */
#define NI6143_DMA_G0_G1_SEL_REG 0x0b /* w8 */
#define NI6143_PIPELINE_DELAY_REG 0x1f /* w8 */
#define NI6143_EOC_SET_REG 0x1d /* w8 */
#define NI6143_DMA_AI_SEL_REG 0x09 /* w8 */
#define NI6143_AI_FIFO_DATA_REG 0x8c /* r32 */
#define NI6143_AI_FIFO_FLAG_REG 0x84 /* w32 */
#define NI6143_AI_FIFO_CTRL_REG 0x88 /* w32 */
#define NI6143_AI_FIFO_STATUS_REG 0x88 /* r32 */
#define NI6143_AI_FIFO_DMA_THRESH_REG 0x90 /* w32 */
#define NI6143_AI_FIFO_WORDS_AVAIL_REG 0x94 /* w32 */
#define Calibration_Channel_6143 0x42 /* w16 */
#define Calibration_LowTime_6143 0x20 /* w16 */
#define Calibration_HighTime_6143 0x22 /* w16 */
#define Relay_Counter_Load_Val__6143 0x4C /* w32 */
#define Signature_6143 0x50 /* w32 */
#define Release_Date_6143 0x54 /* w32 */
#define Release_Oldest_Date_6143 0x58 /* w32 */
#define Calibration_Channel_6143_RelayOn 0x8000 /* Calibration relay switch On */
#define Calibration_Channel_6143_RelayOff 0x4000 /* Calibration relay switch Off */
#define Calibration_Channel_Gnd_Gnd 0x00 /* Offset Calibration */
#define Calibration_Channel_2v5_Gnd 0x02 /* 2.5V Reference */
#define Calibration_Channel_Pwm_Gnd 0x05 /* +/- 5V Self Cal */
#define Calibration_Channel_2v5_Pwm 0x0a /* PWM Calibration */
#define Calibration_Channel_Pwm_Pwm 0x0d /* CMRR */
#define Calibration_Channel_Gnd_Pwm 0x0e /* PWM Calibration */
#define NI6143_CALIB_CHAN_REG 0x42 /* w16 */
#define NI6143_CALIB_CHAN_RELAY_ON BIT(15)
#define NI6143_CALIB_CHAN_RELAY_OFF BIT(14)
#define NI6143_CALIB_CHAN(x) (((x) & 0xf) << 0)
#define NI6143_CALIB_CHAN_GND_GND NI6143_CALIB_CHAN(0) /* Offset Cal */
#define NI6143_CALIB_CHAN_2V5_GND NI6143_CALIB_CHAN(2) /* 2.5V ref */
#define NI6143_CALIB_CHAN_PWM_GND NI6143_CALIB_CHAN(5) /* +-5V Self Cal */
#define NI6143_CALIB_CHAN_2V5_PWM NI6143_CALIB_CHAN(10) /* PWM Cal */
#define NI6143_CALIB_CHAN_PWM_PWM NI6143_CALIB_CHAN(13) /* CMRR */
#define NI6143_CALIB_CHAN_GND_PWM NI6143_CALIB_CHAN(14) /* PWM Cal */
#define NI6143_CALIB_LO_TIME_REG 0x20 /* w16 */
#define NI6143_CALIB_HI_TIME_REG 0x22 /* w16 */
#define NI6143_RELAY_COUNTER_LOAD_REG 0x4c /* w32 */
#define NI6143_SIGNATURE_REG 0x50 /* w32 */
#define NI6143_RELEASE_DATE_REG 0x54 /* w32 */
#define NI6143_RELEASE_OLDEST_DATE_REG 0x58 /* w32 */
/* 671x, 611x registers */