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wifi: rtw89: Add some definitions for USB
Add various register and bit definitions which will be used by the new USB driver. Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com> Acked-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/5812bb0c-20d0-48df-916d-25225eee8132@gmail.com
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Ping-Ke Shih
parent
e2b7160333
commit
ed88640ea1
@@ -382,6 +382,18 @@
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#define B_AX_ACH1_BUSY BIT(9)
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#define B_AX_ACH0_BUSY BIT(8)
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#define R_AX_USB_ENDPOINT_0 0x1060
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#define B_AX_EP_IDX GENMASK(3, 0)
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#define R_AX_USB_ENDPOINT_2 0x1068
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#define NUMP 0x1
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#define R_AX_USB_HOST_REQUEST_2 0x1078
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#define B_AX_R_USBIO_MODE BIT(4)
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#define R_AX_USB3_MAC_NPI_CONFIG_INTF_0 0x1114
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#define B_AX_SSPHY_LFPS_FILTER BIT(31)
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#define R_AX_USB_WLAN0_1 0x1174
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#define B_AX_USBRX_RST BIT(9)
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#define B_AX_USBTX_RST BIT(8)
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#define R_AX_PCIE_DBG_CTRL 0x11C0
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#define B_AX_DBG_DUMMY_MASK GENMASK(23, 16)
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#define B_AX_PCIE_DBG_SEL_MASK GENMASK(15, 13)
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@@ -461,6 +473,17 @@
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#define R_AX_WP_PAGE_CTRL2_V1 0x17A4
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#define R_AX_WP_PAGE_INFO1_V1 0x17A8
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#define R_AX_USB_ENDPOINT_0_V1 0x5060
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#define B_AX_EP_IDX_V1 GENMASK(3, 0)
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#define R_AX_USB_ENDPOINT_2_V1 0x5068
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#define R_AX_USB_HOST_REQUEST_2_V1 0x5078
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#define B_AX_R_USBIO_MODE_V1 BIT(4)
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#define R_AX_USB3_MAC_NPI_CONFIG_INTF_0_V1 0x5114
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#define B_AX_SSPHY_LFPS_FILTER_V1 BIT(31)
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#define R_AX_USB_WLAN0_1_V1 0x5174
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#define B_AX_USBRX_RST_V1 BIT(9)
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#define B_AX_USBTX_RST_V1 BIT(8)
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#define R_AX_H2CREG_DATA0_V1 0x7140
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#define R_AX_H2CREG_DATA1_V1 0x7144
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#define R_AX_H2CREG_DATA2_V1 0x7148
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@@ -1027,6 +1050,12 @@
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#define B_AX_DISPATCHER_INTN_SEL_MASK GENMASK(7, 4)
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#define B_AX_DISPATCHER_CH_SEL_MASK GENMASK(3, 0)
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#define R_AX_RXDMA_SETTING 0x8908
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#define B_AX_BULK_SIZE GENMASK(1, 0)
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#define USB11_BULKSIZE 0x2
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#define USB2_BULKSIZE 0x1
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#define USB3_BULKSIZE 0x0
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#define R_AX_RX_FUNCTION_STOP 0x8920
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#define B_AX_HDR_RX_STOP BIT(0)
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@@ -73,6 +73,7 @@ static inline u8 rtw89_get_data_nss(struct rtw89_dev *rtwdev, u16 hw_rate)
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#define RTW89_TXWD_BODY0_FW_DL BIT(20)
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#define RTW89_TXWD_BODY0_CHANNEL_DMA GENMASK(19, 16)
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#define RTW89_TXWD_BODY0_HDR_LLC_LEN GENMASK(15, 11)
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#define RTW89_TXWD_BODY0_STF_MODE BIT(10)
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#define RTW89_TXWD_BODY0_WD_PAGE BIT(7)
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#define RTW89_TXWD_BODY0_HW_AMSDU BIT(5)
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#define RTW89_TXWD_BODY0_HW_SSN_SEL GENMASK(3, 2)
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