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arm64: dts: qcom: sc7280: Add sound node for CRD 1.0/2.0 and IDP boards

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Add dt nodes for sound card support on revision 3, 4
(aka CRD 1.0 and 2.0) and IDP boards, which is using WCD9385 headset
playback, capture, I2S speaker playback and DMICs via VA macro.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1657200184-29565-12-git-send-email-quic_srivasam@quicinc.com
This commit is contained in:
Srinivasa Rao Mandadapu
2022-07-07 18:53:03 +05:30
committed by Bjorn Andersson
parent f10c73ac6e
commit ece7d81f24
2 changed files with 121 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

23
arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
View File

@@ -87,6 +87,29 @@ &nvme_pwren {
pins = "gpio51";
};
&sound {
audio-routing =
"IN1_HPHL", "HPHL_OUT",
"IN2_HPHR", "HPHR_OUT",
"AMIC1", "MIC BIAS1",
"AMIC2", "MIC BIAS2",
"VA DMIC0", "MIC BIAS1",
"VA DMIC1", "MIC BIAS1",
"VA DMIC2", "MIC BIAS3",
"VA DMIC3", "MIC BIAS3",
"TX SWR_ADC0", "ADC1_OUTPUT",
"TX SWR_ADC1", "ADC2_OUTPUT",
"TX SWR_ADC2", "ADC3_OUTPUT",
"TX SWR_DMIC0", "DMIC1_OUTPUT",
"TX SWR_DMIC1", "DMIC2_OUTPUT",
"TX SWR_DMIC2", "DMIC3_OUTPUT",
"TX SWR_DMIC3", "DMIC4_OUTPUT",
"TX SWR_DMIC4", "DMIC5_OUTPUT",
"TX SWR_DMIC5", "DMIC6_OUTPUT",
"TX SWR_DMIC6", "DMIC7_OUTPUT",
"TX SWR_DMIC7", "DMIC8_OUTPUT";
};
&wcd9385 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>;

98
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
View File

@@ -85,6 +85,104 @@ nvme_3v3_regulator: nvme-3v3-regulator {
pinctrl-names = "default";
pinctrl-0 = <&nvme_pwren>;
};
sound: sound {
compatible = "google,sc7280-herobrine";
model = "sc7280-wcd938x-max98360a-1mic";
audio-routing =
"IN1_HPHL", "HPHL_OUT",
"IN2_HPHR", "HPHR_OUT",
"AMIC1", "MIC BIAS1",
"AMIC2", "MIC BIAS2",
"VA DMIC0", "MIC BIAS3",
"VA DMIC1", "MIC BIAS3",
"VA DMIC2", "MIC BIAS1",
"VA DMIC3", "MIC BIAS1",
"TX SWR_ADC0", "ADC1_OUTPUT",
"TX SWR_ADC1", "ADC2_OUTPUT",
"TX SWR_ADC2", "ADC3_OUTPUT",
"TX SWR_DMIC0", "DMIC1_OUTPUT",
"TX SWR_DMIC1", "DMIC2_OUTPUT",
"TX SWR_DMIC2", "DMIC3_OUTPUT",
"TX SWR_DMIC3", "DMIC4_OUTPUT",
"TX SWR_DMIC4", "DMIC5_OUTPUT",
"TX SWR_DMIC5", "DMIC6_OUTPUT",
"TX SWR_DMIC6", "DMIC7_OUTPUT",
"TX SWR_DMIC7", "DMIC8_OUTPUT";
qcom,msm-mbhc-hphl-swh = <1>;
qcom,msm-mbhc-gnd-swh = <1>;
#address-cells = <1>;
#size-cells = <0>;
#sound-dai-cells = <0>;
dai-link@0 {
link-name = "MAX98360A";
reg = <0>;
cpu {
sound-dai = <&lpass_cpu MI2S_SECONDARY>;
};
codec {
sound-dai = <&max98360a>;
};
};
dai-link@1 {
link-name = "DisplayPort";
reg = <1>;
cpu {
sound-dai = <&lpass_cpu LPASS_DP_RX>;
};
codec {
sound-dai = <&mdss_dp>;
};
};
dai-link@2 {
link-name = "WCD9385 Playback";
reg = <2>;
cpu {
sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
};
codec {
sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>;
};
};
dai-link@3 {
link-name = "WCD9385 Capture";
reg = <3>;
cpu {
sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
};
codec {
sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>;
};
};
dai-link@4 {
link-name = "DMIC";
reg = <4>;
cpu {
sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
};
codec {
sound-dai = <&lpass_va_macro 0>;
};
};
};
};
&apps_rsc {