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drm/amd/display: Fix typo in enable and disable symclk_se

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[Why & How]
Symclk should be based on link_enc_inst, and symclk_fe_sel should be based
on stream_enc_inst.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Taimur Hassan <syed.hassan@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Taimur Hassan
2023-07-17 16:59:57 -04:00
committed by Alex Deucher
parent 927e784c18
commit ec4b70db47
2 changed files with 5 additions and 2 deletions
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4
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
View File

@@ -1150,6 +1150,7 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx)
struct timing_generator *tg = pipe_ctx->stream_res.tg;
struct dtbclk_dto_params dto_params = {0};
int dp_hpo_inst;
struct link_encoder *link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link);
struct stream_encoder *stream_enc = pipe_ctx->stream_res.stream_enc;
if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal)) {
@@ -1178,7 +1179,8 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx)
dccg->funcs->disable_symclk32_se(dccg, dp_hpo_inst);
dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, dp_hpo_inst);
} else if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST && dccg->funcs->disable_symclk_se)
dccg->funcs->disable_symclk_se(dccg, stream_enc->stream_enc_inst);
dccg->funcs->disable_symclk_se(dccg, stream_enc->stream_enc_inst,
link_enc->transmitter - TRANSMITTER_UNIPHY_A);
if (dc->link_srv->dp_is_128b_132b_signal(pipe_ctx)) {
/* TODO: This looks like a bug to me as we are disabling HPO IO when

3
drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h
View File

@@ -180,7 +180,8 @@ struct dccg_funcs {
void (*disable_symclk_se)(
struct dccg *dccg,
uint32_t stream_enc_inst);
uint32_t stream_enc_inst,
uint32_t link_enc_inst);
};
#endif //__DAL_DCCG_H__