mirrors/linux
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-04-06 10:16:16 -04:00
Code Issues Packages Projects Releases Wiki Activity

KVM: x86: hyper-v: Honor HV_MSR_SYNTIMER_AVAILABLE privilege bit

Browse Source 
Synthetic timers MSRs (HV_X64_MSR_STIMER[0-3]_CONFIG,
HV_X64_MSR_STIMER[0-3]_COUNT) are only available to guest when
HV_MSR_SYNTIMER_AVAILABLE bit is exposed.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210521095204.2161214-13-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Vitaly Kuznetsov
2021-05-21 11:51:46 +02:00
committed by Paolo Bonzini
parent 9e2715ca20
commit eba60ddae7
1 changed files with 10 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
arch/x86/kvm/hyperv.c
View File

@@ -1236,6 +1236,16 @@ static bool hv_check_msr_access(struct kvm_vcpu_hv *hv_vcpu, u32 msr)
case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
return hv_vcpu->cpuid_cache.features_eax &
HV_MSR_SYNIC_AVAILABLE;
case HV_X64_MSR_STIMER0_CONFIG:
case HV_X64_MSR_STIMER1_CONFIG:
case HV_X64_MSR_STIMER2_CONFIG:
case HV_X64_MSR_STIMER3_CONFIG:
case HV_X64_MSR_STIMER0_COUNT:
case HV_X64_MSR_STIMER1_COUNT:
case HV_X64_MSR_STIMER2_COUNT:
case HV_X64_MSR_STIMER3_COUNT:
return hv_vcpu->cpuid_cache.features_eax &
HV_MSR_SYNTIMER_AVAILABLE;
default:
break;
}