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mlxsw: cmd: Add CONFIG_PROFILE.{set_, }lag_mode
Add CONFIG_PROFILE.lag_mode, which serves for moving responsibility for placement of the LAG table from FW to SW. Whether lag_mode should be configured is determined by CONFIG_PROFILE.set_lag_mode, which also add. Signed-off-by: Petr Machata <petrm@nvidia.com> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
committed by
David S. Miller
parent
be9ed47d3f
commit
eb26a59232
@@ -695,6 +695,12 @@ MLXSW_ITEM32(cmd_mbox, config_profile, set_cqe_version, 0x08, 0, 1);
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*/
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MLXSW_ITEM32(cmd_mbox, config_profile, set_cqe_time_stamp_type, 0x08, 2, 1);
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/* cmd_mbox_config_profile_set_lag_mode
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* Capability bit. Setting a bit to 1 configures the lag_mode
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* according to the mailbox contents.
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*/
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MLXSW_ITEM32(cmd_mbox, config_profile, set_lag_mode, 0x08, 7, 1);
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/* cmd_mbox_config_profile_max_vepa_channels
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* Maximum number of VEPA channels per port (0 through 16)
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* 0 - multi-channel VEPA is disabled
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@@ -840,6 +846,21 @@ MLXSW_ITEM32(cmd_mbox, config_profile, arn, 0x50, 31, 1);
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*/
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MLXSW_ITEM32(cmd_mbox, config_profile, ubridge, 0x50, 4, 1);
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enum mlxsw_cmd_mbox_config_profile_lag_mode {
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/* FW manages PGT LAG table */
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MLXSW_CMD_MBOX_CONFIG_PROFILE_LAG_MODE_FW,
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/* SW manages PGT LAG table */
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MLXSW_CMD_MBOX_CONFIG_PROFILE_LAG_MODE_SW,
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};
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/* cmd_mbox_config_profile_lag_mode
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* LAG mode
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* Configured if set_lag_mode is set
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* Supported from Spectrum-2 and above.
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* Supported only when ubridge = 1
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*/
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MLXSW_ITEM32(cmd_mbox, config_profile, lag_mode, 0x50, 3, 1);
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/* cmd_mbox_config_kvd_linear_size
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* KVD Linear Size
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* Valid for Spectrum only
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