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arm64: dts: renesas: r8a7795: Increase the number of GPIO bank 1 ports to 29

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This patch changes the number of GPIO bank 1 ports to 29 because GP-1-28
port pin of R8A7795 ES2.0 SoC support was added.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Fixes: 291e0c4994 ("arm64: dts: r8a7795: Add support for R-Car H3 ES2.0")
[geert: Keep 28 GPIOs on H3 ES1.x after r8a7795.dtsi sharing]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Takeshi Kihara
2017-11-23 11:58:50 +01:00
committed by Simon Horman
parent e2767b0f21
commit eb14ed1ad7
2 changed files with 5 additions and 1 deletions
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4
arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
View File

@@ -109,6 +109,10 @@ fdp1@fe948000 {
};
};
&gpio1 {
gpio-ranges = <&pfc 0 32 28>;
};
&ipmmu_vi0 {
renesas,ipmmu-main = <&ipmmu_mm 11>;
};

2
arch/arm64/boot/dts/renesas/r8a7795.dtsi
View File

@@ -240,7 +240,7 @@ gpio1: gpio@e6051000 {
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 32 28>;
gpio-ranges = <&pfc 0 32 29>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 911>;