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arm64: dts: renesas: r9a08g046: Add pincontrol node

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Add pincontrol node to RZ/G3L ("R9A08G046") SoC DTSI and set the icu as
the interrupt-parent of the pin controller to route GPIO interrupts
through the IA55 interrupt controller.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260430125342.439755-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das
2026-04-30 13:53:07 +01:00
committed by Geert Uytterhoeven
parent b3eea87822
commit ea82a68bb3
1 changed files with 12 additions and 1 deletions
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13
arch/arm64/boot/dts/renesas/r9a08g046.dtsi
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@@ -204,10 +204,21 @@ sysc: system-controller@11020000 {
};
pinctrl: pinctrl@11030000 {
compatible = "renesas,r9a08g046-pinctrl";
reg = <0 0x11030000 0 0x10000>;
gpio-controller;
#gpio-cells = <2>;
/* placeholder */
gpio-ranges = <&pinctrl 0 0 232>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&icu>;
clocks = <&cpg CPG_MOD R9A08G046_GPIO_HCLK>;
power-domains = <&cpg>;
resets = <&cpg R9A08G046_GPIO_RSTN>,
<&cpg R9A08G046_GPIO_PORT_RESETN>,
<&cpg R9A08G046_GPIO_SPARE_RESETN>;
reset-names = "rstn", "port", "spare";
renesas,clonech = <&sysc 0xe2c>;
};
icu: interrupt-controller@11050000 {