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arm64: dts: Add ARM SP804 timer DT nodes for NS2

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We have four ARM SP804 dual-mode timer instances in NS2 SoC
hence this patch adds appropriate DT nodes for NS2.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Pramod KUMAR <pramodku@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This commit is contained in:
Anup Patel
2016-02-10 11:40:48 +05:30
committed by Florian Fainelli
parent efc877676d
commit e99df8fd2b
1 changed files with 40 additions and 0 deletions
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40
arch/arm64/boot/dts/broadcom/ns2.dtsi
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@@ -256,6 +256,46 @@ gic: interrupt-controller@65210000 {
<0x65260000 0x1000>;
};
timer0: timer@66030000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x66030000 0x1000>;
interrupts = <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&iprocslow>,
<&iprocslow>,
<&iprocslow>;
clock-names = "timer1", "timer2", "apb_pclk";
};
timer1: timer@66040000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x66040000 0x1000>;
interrupts = <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&iprocslow>,
<&iprocslow>,
<&iprocslow>;
clock-names = "timer1", "timer2", "apb_pclk";
};
timer2: timer@66050000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x66050000 0x1000>;
interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&iprocslow>,
<&iprocslow>,
<&iprocslow>;
clock-names = "timer1", "timer2", "apb_pclk";
};
timer3: timer@66060000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x66060000 0x1000>;
interrupts = <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&iprocslow>,
<&iprocslow>,
<&iprocslow>;
clock-names = "timer1", "timer2", "apb_pclk";
};
i2c0: i2c@66080000 {
compatible = "brcm,iproc-i2c";
reg = <0x66080000 0x100>;