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clk: renesas: r8a779h0: Add EtherAVB clocks

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Add the module clocks used by the Ethernet AVB (EtherAVB-IF) blocks on
the Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/a5b4252d9822ded3fd523bc35417306cae2ec2bd.1707661303.git.geert+renesas@glider.be
This commit is contained in:
Cong Dang
2024-02-11 15:22:46 +01:00
committed by Geert Uytterhoeven
parent 46fb5dd9ca
commit e89ea92f53
1 changed files with 3 additions and 0 deletions
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3
drivers/clk/renesas/r8a779h0-cpg-mssr.c
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@@ -173,6 +173,9 @@ static const struct cpg_core_clk r8a779h0_core_clks[] = {
};
static const struct mssr_mod_clk r8a779h0_mod_clks[] = {
DEF_MOD("avb0:rgmii0", 211, R8A779H0_CLK_S0D8_HSC),
DEF_MOD("avb1:rgmii1", 212, R8A779H0_CLK_S0D8_HSC),
DEF_MOD("avb2:rgmii2", 213, R8A779H0_CLK_S0D8_HSC),
DEF_MOD("hscif0", 514, R8A779H0_CLK_SASYNCPERD1),
DEF_MOD("hscif1", 515, R8A779H0_CLK_SASYNCPERD1),
DEF_MOD("hscif2", 516, R8A779H0_CLK_SASYNCPERD1),