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arm64: dts: s32g: add FlexCAN[0..3] support for s32g2 and s32g3

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Add FlexCAN[0..3] for S32G2 and S32G3 SoCs.

Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Ciprian Marian Costea
2025-02-24 15:40:16 +02:00
committed by Shawn Guo
parent e3e8b199af
commit e82bc7cfea
4 changed files with 228 additions and 0 deletions
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52
arch/arm64/boot/dts/freescale/s32g2.dtsi
View File

@@ -334,6 +334,32 @@ edma0: dma-controller@40144000 {
clock-names = "dmamux0", "dmamux1";
};
can0: can@401b4000 {
compatible = "nxp,s32g2-flexcan";
reg = <0x401b4000 0xa000>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mb-0", "state", "berr", "mb-1";
clocks = <&clks 9>, <&clks 11>;
clock-names = "ipg", "per";
status = "disabled";
};
can1: can@401be000 {
compatible = "nxp,s32g2-flexcan";
reg = <0x401be000 0xa000>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mb-0", "state", "berr", "mb-1";
clocks = <&clks 9>, <&clks 11>;
clock-names = "ipg", "per";
status = "disabled";
};
uart0: serial@401c8000 {
compatible = "nxp,s32g2-linflexuart",
"fsl,s32v234-linflexuart";
@@ -400,6 +426,32 @@ edma1: dma-controller@40244000 {
clock-names = "dmamux0", "dmamux1";
};
can2: can@402a8000 {
compatible = "nxp,s32g2-flexcan";
reg = <0x402a8000 0xa000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mb-0", "state", "berr", "mb-1";
clocks = <&clks 9>, <&clks 11>;
clock-names = "ipg", "per";
status = "disabled";
};
can3: can@402b2000 {
compatible = "nxp,s32g2-flexcan";
reg = <0x402b2000 0xa000>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mb-0", "state", "berr", "mb-1";
clocks = <&clks 9>, <&clks 11>;
clock-names = "ipg", "per";
status = "disabled";
};
uart2: serial@402bc000 {
compatible = "nxp,s32g2-linflexuart",
"fsl,s32v234-linflexuart";

56
arch/arm64/boot/dts/freescale/s32g3.dtsi
View File

@@ -391,6 +391,34 @@ edma0: dma-controller@40144000 {
clock-names = "dmamux0", "dmamux1";
};
can0: can@401b4000 {
compatible = "nxp,s32g3-flexcan",
"nxp,s32g2-flexcan";
reg = <0x401b4000 0xa000>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mb-0", "state", "berr", "mb-1";
clocks = <&clks 9>, <&clks 11>;
clock-names = "ipg", "per";
status = "disabled";
};
can1: can@401be000 {
compatible = "nxp,s32g3-flexcan",
"nxp,s32g2-flexcan";
reg = <0x401be000 0xa000>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mb-0", "state", "berr", "mb-1";
clocks = <&clks 9>, <&clks 11>;
clock-names = "ipg", "per";
status = "disabled";
};
uart0: serial@401c8000 {
compatible = "nxp,s32g3-linflexuart",
"fsl,s32v234-linflexuart";
@@ -460,6 +488,34 @@ edma1: dma-controller@40244000 {
clock-names = "dmamux0", "dmamux1";
};
can2: can@402a8000 {
compatible = "nxp,s32g3-flexcan",
"nxp,s32g2-flexcan";
reg = <0x402a8000 0xa000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mb-0", "state", "berr", "mb-1";
clocks = <&clks 9>, <&clks 11>;
clock-names = "ipg", "per";
status = "disabled";
};
can3: can@402b2000 {
compatible = "nxp,s32g3-flexcan",
"nxp,s32g2-flexcan";
reg = <0x402b2000 0xa000>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mb-0", "state", "berr", "mb-1";
clocks = <&clks 9>, <&clks 11>;
clock-names = "ipg", "per";
status = "disabled";
};
uart2: serial@402bc000 {
compatible = "nxp,s32g3-linflexuart",
"fsl,s32v234-linflexuart";

72
arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi
View File

@@ -8,6 +8,60 @@
*/
&pinctrl {
can0_pins: can0-pins {
can0-grp0 {
pinmux = <0x2c1>;
output-enable;
slew-rate = <133>;
};
can0-grp1 {
pinmux = <0x2b0>;
input-enable;
slew-rate = <133>;
};
can0-grp2 {
pinmux = <0x2012>;
};
};
can2_pins: can2-pins {
can2-grp0 {
pinmux = <0x1b2>;
output-enable;
slew-rate = <133>;
};
can2-grp1 {
pinmux = <0x1c0>;
input-enable;
slew-rate = <133>;
};
can2-grp2 {
pinmux = <0x2782>;
};
};
can3_pins: can3-pins {
can3-grp0 {
pinmux = <0x192>;
output-enable;
slew-rate = <133>;
};
can3-grp1 {
pinmux = <0x1a0>;
input-enable;
slew-rate = <133>;
};
can3-grp2 {
pinmux = <0x2792>;
};
};
i2c0_pins: i2c0-pins {
i2c0-grp0 {
pinmux = <0x101>, <0x111>;
@@ -121,6 +175,24 @@ i2c4-gpio-grp1 {
};
};
&can0 {
pinctrl-names = "default";
pinctrl-0 = <&can0_pins>;
status = "okay";
};
&can2 {
pinctrl-names = "default";
pinctrl-0 = <&can2_pins>;
status = "okay";
};
&can3 {
pinctrl-names = "default";
pinctrl-0 = <&can3_pins>;
status = "okay";
};
&i2c0 {
pinctrl-names = "default", "gpio";
pinctrl-0 = <&i2c0_pins>;

48
arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi
View File

@@ -8,6 +8,42 @@
*/
&pinctrl {
can0_pins: can0-pins {
can0-grp0 {
pinmux = <0x112>;
output-enable;
slew-rate = <133>;
};
can0-grp1 {
pinmux = <0x120>;
input-enable;
slew-rate = <133>;
};
can0-grp2 {
pinmux = <0x2013>;
};
};
can1_pins: can1-pins {
can1-grp0 {
pinmux = <0x132>;
output-enable;
slew-rate = <133>;
};
can1-grp1 {
pinmux = <0x140>;
input-enable;
slew-rate = <133>;
};
can1-grp2 {
pinmux = <0x2772>;
};
};
i2c0_pins: i2c0-pins {
i2c0-grp0 {
pinmux = <0x1f2>, <0x201>;
@@ -93,6 +129,18 @@ i2c4-gpio-grp1 {
};
};
&can0 {
pinctrl-names = "default";
pinctrl-0 = <&can0_pins>;
status = "okay";
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&can1_pins>;
status = "okay";
};
&i2c0 {
pinctrl-names = "default", "gpio";
pinctrl-0 = <&i2c0_pins>;