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Merge branch 'v6.9-shared/clkids' into v6.9-armsoc/dts64

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This commit is contained in:
Heiko Stuebner
2024-02-27 17:05:38 +01:00
parent 4622485f00 c81798cf9d
commit e7c86cb7b5
4 changed files with 24 additions and 3 deletions
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5
drivers/clk/rockchip/clk-rk3588.c
View File

@@ -2458,15 +2458,18 @@ static struct rockchip_clk_branch rk3588_clk_branches[] __initdata = {
static void __init rk3588_clk_init(struct device_node *np)
{
struct rockchip_clk_provider *ctx;
unsigned long clk_nr_clks;
void __iomem *reg_base;
clk_nr_clks = rockchip_clk_find_max_clk_id(rk3588_clk_branches,
ARRAY_SIZE(rk3588_clk_branches)) + 1;
reg_base = of_iomap(np, 0);
if (!reg_base) {
pr_err("%s: could not map cru region\n", __func__);
return;
}
ctx = rockchip_clk_init(np, reg_base, CLK_NR_CLKS);
ctx = rockchip_clk_init(np, reg_base, clk_nr_clks);
if (IS_ERR(ctx)) {
pr_err("%s: rockchip clk init failed\n", __func__);
iounmap(reg_base);

17
drivers/clk/rockchip/clk.c
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@@ -429,6 +429,23 @@ void rockchip_clk_register_plls(struct rockchip_clk_provider *ctx,
}
EXPORT_SYMBOL_GPL(rockchip_clk_register_plls);
unsigned long rockchip_clk_find_max_clk_id(struct rockchip_clk_branch *list,
unsigned int nr_clk)
{
unsigned long max = 0;
unsigned int idx;
for (idx = 0; idx < nr_clk; idx++, list++) {
if (list->id > max)
max = list->id;
if (list->child && list->child->id > max)
max = list->id;
}
return max;
}
EXPORT_SYMBOL_GPL(rockchip_clk_find_max_clk_id);
void rockchip_clk_register_branches(struct rockchip_clk_provider *ctx,
struct rockchip_clk_branch *list,
unsigned int nr_clk)

2
drivers/clk/rockchip/clk.h
View File

@@ -973,6 +973,8 @@ struct rockchip_clk_provider *rockchip_clk_init(struct device_node *np,
void __iomem *base, unsigned long nr_clks);
void rockchip_clk_of_add_provider(struct device_node *np,
struct rockchip_clk_provider *ctx);
unsigned long rockchip_clk_find_max_clk_id(struct rockchip_clk_branch *list,
unsigned int nr_clk);
void rockchip_clk_register_branches(struct rockchip_clk_provider *ctx,
struct rockchip_clk_branch *list,
unsigned int nr_clk);

3
include/dt-bindings/clock/rockchip,rk3588-cru.h
View File

@@ -733,8 +733,7 @@
#define ACLK_AV1_PRE 718
#define PCLK_AV1_PRE 719
#define HCLK_SDIO_PRE 720
#define CLK_NR_CLKS (HCLK_SDIO_PRE + 1)
#define PCLK_VO1GRF 721
/* scmi-clocks indices */