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drm/i915/gem: Wait until the context is finally retired before releasing engines

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If we want to percolate information back from the HW, up through the GEM
context, we need to wait until the intel_context is scheduled out for
the last time. This is handled by the retirement of the intel_context's
barrier, i.e. by listening to the pulse after the notional unpin. So
wait until the intel_context is finally retired before releasing the
engine, so that we can inspect the final context state and pass it on.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200406155840.1728-3-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson
2020-04-06 16:58:40 +01:00
parent 3b0a05792e
commit e68296259c
1 changed files with 6 additions and 10 deletions
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16
drivers/gpu/drm/i915/gem/i915_gem_context.c
View File

@@ -570,23 +570,19 @@ static void engines_idle_release(struct i915_gem_context *ctx,
engines->ctx = i915_gem_context_get(ctx);
for_each_gem_engine(ce, engines, it) {
struct dma_fence *fence;
int err = 0;
int err;
/* serialises with execbuf */
set_bit(CONTEXT_CLOSED_BIT, &ce->flags);
if (!intel_context_pin_if_active(ce))
continue;
fence = i915_active_fence_get(&ce->timeline->last_request);
if (fence) {
err = i915_sw_fence_await_dma_fence(&engines->fence,
fence, 0,
GFP_KERNEL);
dma_fence_put(fence);
}
/* Wait until context is finally scheduled out and retired */
err = i915_sw_fence_await_active(&engines->fence,
&ce->active,
I915_ACTIVE_AWAIT_BARRIER);
intel_context_unpin(ce);
if (err < 0)
if (err)
goto kill;
}