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Merge tag 'samsung-dt64-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt

Browse Source 
Samsung DTS ARM64 changes for v6.17

1. New SoC - Exynos2200 SoC - with basic nodes, pin controllers,
   clock controllers and initial USB support.  Add board using it:
   Samsung Galaxy S22+ (SM-S906B), called G0S.

2. ExynosAutov920: Add CMU_HSI2 clock controller, remaining SPI nodes

3. Google GS101:
   - Prepare to switching to architected timer, instead of Exynos MCT as
     the primary one.
   - Add secondary Maxim MAX77759 PMIC to Pixel boards, managing USB Type-C and
     charger.
   - Add incomplete description of the primary Samsung S2MPG10 PMIC.
     Several bits, like regulators, are still missing, though.
   - Add also secondary reboot-mode, via MAX77759 NVMEM.
   - Switch the primary (SoC) reboot handler to Google specific
     google,gs101-reboot which gives additional GS101 features (cold and
     warm reboots).
     This change will affect other users of this DTS, but to our
     knowledge there is only Android, from which this change originates.

4. Exynos7870:
   - Fix speed problems in USB gadget mode.
   - Correct memory map to avoid crashes due to secure world.

* tag 'samsung-dt64-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos7870-j6lte: reduce memory ranges to base amount
  arm64: dts: exynos7870-on7xelte: reduce memory ranges to base amount
  arm64: dts: exynos7870: add quirk to disable USB2 LPM in gadget mode
  arm64: dts: exynos: gs101: switch to gs101 specific reboot
  arm64: dts: exynos: gs101-pixel-common: add main PMIC node
  arm64: dts: exynos: gs101: ufs: add dma-coherent property
  arm64: dts: exynos: gs101: add dm-verity-device-corrupted syscon-reboot-mode
  arm64: dts: exynos: gs101-pixel-common: add nvmem-reboot-mode
  arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMIC
  arm64: dts: exynos5433: Align i2c-gpio node names with dtschema
  arm64: dts: exynos: gs101: Add 'local-timer-stop' to cpuidle nodes
  arm64: dts: exynosautov920: Add DT node for all SPI ports
  arm64: dts: exynosautov920: add CMU_HSI2 clock DT nodes
  MAINTAINERS: add entry for Samsung Exynos2200 SoC
  arm64: dts: exynos: add initial support for Samsung Galaxy S22+
  arm64: dts: exynos: add initial support for exynos2200 SoC
  dt-bindings: arm: samsung: document g0s board binding

Link: https://lore.kernel.org/r/20250709191523.171359-6-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2025-07-21 16:59:37 +02:00
parent ad6d5af8bb 49a27c6c39
commit e65761ff6b
13 changed files with 2996 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
View File

@@ -45,6 +45,12 @@ properties:
- const: samsung,aries
- const: samsung,s5pv210
- description: Exynos2200 based boards
items:
- enum:
- samsung,g0s # Samsung Galaxy S22+ (SM-S906B)
- const: samsung,exynos2200
- description: Exynos3250 based boards
items:
- enum:

10
MAINTAINERS
View File

@@ -21941,6 +21941,16 @@ B: mailto:linux-samsung-soc@vger.kernel.org
F: Documentation/devicetree/bindings/sound/samsung*
F: sound/soc/samsung/
SAMSUNG EXYNOS2200 SoC SUPPORT
M: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: linux-samsung-soc@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/clock/samsung,exynos2200-cmu.yaml
F: arch/arm64/boot/dts/exynos/exynos2200*
F: drivers/clk/samsung/clk-exynos2200.c
F: include/dt-bindings/clock/samsung,exynos2200-cmu.h
SAMSUNG EXYNOS850 SoC SUPPORT
M: Sam Protsenko <semen.protsenko@linaro.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

1
arch/arm64/boot/dts/exynos/Makefile
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@@ -2,6 +2,7 @@
subdir-y += google
dtb-$(CONFIG_ARCH_EXYNOS) += \
exynos2200-g0s.dtb \
exynos5433-tm2.dtb \
exynos5433-tm2e.dtb \
exynos7-espresso.dtb \

169
arch/arm64/boot/dts/exynos/exynos2200-g0s.dts Normal file
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@@ -0,0 +1,169 @@
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
/*
* Samsung Galaxy S22+ (g0s/SM-S906B) device tree source
*
* Copyright (c) 2025, Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
*/
/dts-v1/;
#include "exynos2200.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Samsung Galaxy S22+ (SM-S906B)";
compatible = "samsung,g0s", "samsung,exynos2200";
chassis-type = "handset";
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
framebuffer: framebuffer {
compatible = "simple-framebuffer";
memory-region = <&cont_splash_mem>;
width = <1080>;
height = <2340>;
stride = <(1080 * 4)>;
format = "a8r8g8b8";
};
};
/*
* RTC clock (XrtcXTI); external, must be 32.768 kHz.
*
* TODO: Remove this once RTC clock is implemented properly as part of
* PMIC driver.
*/
rtcclk: clock-rtcclk {
compatible = "fixed-clock";
clock-output-names = "rtcclk";
#clock-cells = <0>;
clock-frequency = <32768>;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&key_volup>;
pinctrl-names = "default";
volup-key {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
gpios = <&gpa3 0 GPIO_ACTIVE_LOW>;
wakeup-source;
};
};
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x80000000>,
<0x8 0x80000000 0x1 0x7e000000>;
};
/* TODO: Remove this once PMIC is implemented */
reg_dummy: regulator-0 {
compatible = "regulator-fixed";
regulator-name = "dummy_reg";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
cont_splash_mem: framebuffer@f6200000 {
reg = <0x0 0xf6200000 0x0 (1080 * 2340 * 4)>;
no-map;
};
debug_kinfo_reserved: debug-kinfo-reserved@fcfff000 {
reg = <0x0 0xfcfff000 0x0 0x1000>;
no-map;
};
log_itmon: log-itmon@fffe0000 {
reg = <0x0 0xfffe0000 0x0 0x20000>;
no-map;
};
};
};
&cmu_hsi0 {
clocks = <&xtcxo>,
<&rtcclk>,
<&cmu_top CLK_DOUT_CMU_HSI0_NOC>,
<&cmu_top CLK_DOUT_CMU_HSI0_DPGTC>,
<&cmu_top CLK_DOUT_CMU_HSI0_DPOSC>,
<&cmu_top CLK_DOUT_CMU_HSI0_USB32DRD>;
clock-names = "oscclk", "rtcclk", "noc", "dpgtc", "dposc", "usb";
};
/*
* cpu2 and cpu3 fail to come up consistently, which leads to a hang later
* in the boot process. Disable them until the issue is figured out.
*/
&cpu2 {
status = "fail";
};
&cpu3 {
status = "fail";
};
&ext_26m {
clock-frequency = <26000000>;
};
&ext_200m {
clock-frequency = <200000000>;
};
&mct_peris {
status = "okay";
};
&pinctrl_alive {
key_volup: key-volup-pins {
samsung,pins = "gpa3-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS7_PIN_DRV_LV4>;
};
};
&ppi_cluster0 {
affinity = <&cpu0 &cpu1>;
};
&usb {
/* TODO: Replace these once PMIC is implemented */
vdd10-supply = <&reg_dummy>;
vdd33-supply = <&reg_dummy>;
status = "okay";
};
&usb32drd {
status = "okay";
};
&usb_dwc3 {
dr_mode = "otg";
usb-role-switch;
role-switch-default-mode = "peripheral";
maximum-speed = "high-speed";
};
&usb_hsphy {
/* TODO: Replace these once PMIC is implemented */
vdda12-supply = <&reg_dummy>;
vdd-supply = <&reg_dummy>;
status = "okay";
};
&xtcxo {
clock-frequency = <76800000>;
};

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arch/arm64/boot/dts/exynos/exynos2200-pinctrl.dtsi Normal file
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561
arch/arm64/boot/dts/exynos/exynos2200.dtsi Normal file
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@@ -0,0 +1,561 @@
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
/*
* Samsung's Exynos 2200 SoC device tree source
*
* Copyright (c) 2025, Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
*/
#include <dt-bindings/clock/samsung,exynos2200-cmu.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
compatible = "samsung,exynos2200";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&gic>;
aliases {
pinctrl0 = &pinctrl_alive;
pinctrl1 = &pinctrl_cmgp;
pinctrl2 = &pinctrl_hsi1;
pinctrl3 = &pinctrl_ufs;
pinctrl4 = &pinctrl_hsi1ufs;
pinctrl5 = &pinctrl_peric0;
pinctrl6 = &pinctrl_peric1;
pinctrl7 = &pinctrl_peric2;
pinctrl8 = &pinctrl_vts;
};
xtcxo: clock-1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "oscclk";
};
ext_26m: clock-2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "ext-26m";
};
ext_200m: clock-3 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "ext-200m";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
core2 {
cpu = <&cpu2>;
};
core3 {
cpu = <&cpu3>;
};
};
cluster1 {
core0 {
cpu = <&cpu4>;
};
core1 {
cpu = <&cpu5>;
};
core2 {
cpu = <&cpu6>;
};
};
cluster2 {
core0 {
cpu = <&cpu7>;
};
};
};
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a510";
reg = <0>;
capacity-dmips-mhz = <260>;
dynamic-power-coefficient = <189>;
enable-method = "psci";
cpu-idle-states = <&little_cpu_sleep>;
};
cpu1: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a510";
reg = <0x100>;
capacity-dmips-mhz = <260>;
dynamic-power-coefficient = <189>;
enable-method = "psci";
cpu-idle-states = <&little_cpu_sleep>;
};
cpu2: cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a510";
reg = <0x200>;
capacity-dmips-mhz = <260>;
dynamic-power-coefficient = <189>;
enable-method = "psci";
cpu-idle-states = <&little_cpu_sleep>;
};
cpu3: cpu@300 {
device_type = "cpu";
compatible = "arm,cortex-a510";
reg = <0x300>;
capacity-dmips-mhz = <260>;
dynamic-power-coefficient = <189>;
enable-method = "psci";
cpu-idle-states = <&little_cpu_sleep>;
};
cpu4: cpu@400 {
device_type = "cpu";
compatible = "arm,cortex-a710";
reg = <0x400>;
capacity-dmips-mhz = <380>;
dynamic-power-coefficient = <560>;
enable-method = "psci";
cpu-idle-states = <&big_cpu_sleep>;
};
cpu5: cpu@500 {
device_type = "cpu";
compatible = "arm,cortex-a710";
reg = <0x500>;
capacity-dmips-mhz = <380>;
dynamic-power-coefficient = <560>;
enable-method = "psci";
cpu-idle-states = <&big_cpu_sleep>;
};
cpu6: cpu@600 {
device_type = "cpu";
compatible = "arm,cortex-a710";
reg = <0x600>;
capacity-dmips-mhz = <380>;
dynamic-power-coefficient = <560>;
enable-method = "psci";
cpu-idle-states = <&big_cpu_sleep>;
};
cpu7: cpu@700 {
device_type = "cpu";
compatible = "arm,cortex-x2";
reg = <0x700>;
capacity-dmips-mhz = <488>;
dynamic-power-coefficient = <765>;
enable-method = "psci";
cpu-idle-states = <&prime_cpu_sleep>;
};
idle-states {
entry-method = "psci";
little_cpu_sleep: cpu-sleep-0 {
compatible = "arm,idle-state";
idle-state-name = "c2";
entry-latency-us = <70>;
exit-latency-us = <170>;
min-residency-us = <2000>;
arm,psci-suspend-param = <0x10000>;
};
big_cpu_sleep: cpu-sleep-1 {
compatible = "arm,idle-state";
idle-state-name = "c2";
entry-latency-us = <235>;
exit-latency-us = <220>;
min-residency-us = <3500>;
arm,psci-suspend-param = <0x10000>;
};
prime_cpu_sleep: cpu-sleep-2 {
compatible = "arm,idle-state";
idle-state-name = "c2";
entry-latency-us = <150>;
exit-latency-us = <190>;
min-residency-us = <2500>;
arm,psci-suspend-param = <0x10000>;
};
};
};
pmu-a510 {
compatible = "arm,cortex-a510-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster0>;
};
pmu-a710 {
compatible = "arm,cortex-a710-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster1>;
};
pmu-x2 {
compatible = "arm,cortex-x2-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster2>;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
soc {
compatible = "simple-bus";
ranges;
#address-cells = <2>;
#size-cells = <2>;
chipid@10000000 {
compatible = "samsung,exynos2200-chipid",
"samsung,exynos850-chipid";
reg = <0x0 0x10000000 0x0 0x24>;
};
cmu_peris: clock-controller@10020000 {
compatible = "samsung,exynos2200-cmu-peris";
reg = <0x0 0x10020000 0x0 0x8000>;
#clock-cells = <1>;
clocks = <&cmu_top CLK_DOUT_TCXO_DIV3>,
<&cmu_top CLK_DOUT_CMU_PERIS_NOC>,
<&cmu_top CLK_DOUT_CMU_PERIS_GIC>;
clock-names = "tcxo_div3",
"noc",
"gic";
};
mct_peris: timer@10040000 {
compatible = "samsung,exynos2200-mct-peris",
"samsung,exynos4210-mct";
reg = <0x0 0x10040000 0x0 0x800>;
clocks = <&cmu_top CLK_DOUT_TCXO_DIV3>, <&cmu_peris CLK_MOUT_PERIS_GIC>;
clock-names = "fin_pll", "mct";
interrupts = <GIC_SPI 943 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 944 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 945 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 946 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 947 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 948 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 949 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 950 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 951 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 952 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 953 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 954 IRQ_TYPE_LEVEL_HIGH 0>;
status = "disabled";
};
gic: interrupt-controller@10200000 {
compatible = "arm,gic-v3";
reg = <0x0 0x10200000 0x0 0x10000>, /* GICD */
<0x0 0x10240000 0x0 0x200000>; /* GICR * 8 */
#interrupt-cells = <4>;
interrupt-controller;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
ppi-partitions {
ppi_cluster0: interrupt-partition-0 {
affinity = <&cpu0 &cpu1 &cpu2 &cpu3>;
};
ppi_cluster1: interrupt-partition-1 {
affinity = <&cpu4 &cpu5 &cpu6>;
};
ppi_cluster2: interrupt-partition-2 {
affinity = <&cpu7>;
};
};
};
cmu_peric0: clock-controller@10400000 {
compatible = "samsung,exynos2200-cmu-peric0";
reg = <0x0 0x10400000 0x0 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top CLK_DOUT_CMU_PERIC0_NOC>,
<&cmu_top CLK_DOUT_CMU_PERIC0_IP0>,
<&cmu_top CLK_DOUT_CMU_PERIC0_IP1>;
clock-names = "oscclk", "noc", "ip0", "ip1";
};
syscon_peric0: syscon@10420000 {
compatible = "samsung,exynos2200-peric0-sysreg", "syscon";
reg = <0x0 0x10420000 0x0 0x2000>;
};
pinctrl_peric0: pinctrl@10430000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x0 0x10430000 0x0 0x1000>;
};
cmu_peric1: clock-controller@10700000 {
compatible = "samsung,exynos2200-cmu-peric1";
reg = <0x0 0x10700000 0x0 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top CLK_DOUT_CMU_PERIC1_NOC>,
<&cmu_top CLK_DOUT_CMU_PERIC1_IP0>,
<&cmu_top CLK_DOUT_CMU_PERIC1_IP1>;
clock-names = "oscclk", "noc", "ip0", "ip1";
};
syscon_peric1: syscon@10720000 {
compatible = "samsung,exynos2200-peric1-sysreg", "syscon";
reg = <0x0 0x10720000 0x0 0x2000>;
};
pinctrl_peric1: pinctrl@10730000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x0 0x10730000 0x0 0x1000>;
};
cmu_hsi0: clock-controller@10a00000 {
compatible = "samsung,exynos2200-cmu-hsi0";
reg = <0x0 0x10a00000 0x0 0x8000>;
#clock-cells = <1>;
};
usb32drd: phy@10aa0000 {
compatible = "samsung,exynos2200-usb32drd-phy";
reg = <0x0 0x10aa0000 0x0 0x10000>;
clocks = <&cmu_hsi0 CLK_MOUT_HSI0_NOC>;
clock-names = "phy";
#phy-cells = <1>;
phys = <&usb_hsphy>;
phy-names = "hs";
samsung,pmu-syscon = <&pmu_system_controller>;
status = "disabled";
};
usb_hsphy: phy@10ab0000 {
compatible = "samsung,exynos2200-eusb2-phy";
reg = <0x0 0x10ab0000 0x0 0x10000>;
clocks = <&cmu_hsi0 CLK_MOUT_HSI0_USB32DRD>,
<&cmu_hsi0 CLK_MOUT_HSI0_NOC>,
<&cmu_hsi0 CLK_DOUT_DIV_CLK_HSI0_EUSB>;
clock-names = "ref", "bus", "ctrl";
#phy-cells = <0>;
status = "disabled";
};
usb: usb@10b00000 {
compatible = "samsung,exynos2200-dwusb3";
ranges = <0x0 0x0 0x10b00000 0x10000>;
clocks = <&cmu_hsi0 CLK_MOUT_HSI0_NOC>;
clock-names = "link_aclk";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
usb_dwc3: usb@0 {
compatible = "snps,dwc3";
reg = <0x0 0x10000>;
clocks = <&cmu_hsi0 CLK_MOUT_HSI0_USB32DRD>;
clock-names = "ref";
interrupts = <GIC_SPI 485 IRQ_TYPE_LEVEL_HIGH 0>;
phys = <&usb32drd 0>;
phy-names = "usb2-phy";
snps,dis-u2-freeclk-exists-quirk;
snps,gfladj-refclk-lpm-sel-quirk;
snps,has-lpm-erratum;
snps,quirk-frame-length-adjustment = <0x20>;
snps,usb3_lpm_capable;
};
};
cmu_ufs: clock-controller@11000000 {
compatible = "samsung,exynos2200-cmu-ufs";
reg = <0x0 0x11000000 0x0 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top CLK_DOUT_CMU_UFS_NOC>,
<&cmu_top CLK_MOUT_CMU_UFS_MMC_CARD>,
<&cmu_top CLK_DOUT_CMU_UFS_UFS_EMBD>;
clock-names = "oscclk", "noc", "mmc", "ufs";
};
syscon_ufs: syscon@11020000 {
compatible = "samsung,exynos2200-ufs-sysreg", "syscon";
reg = <0x0 0x11020000 0x0 0x2000>;
};
pinctrl_ufs: pinctrl@11040000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x0 0x11040000 0x0 0x1000>;
};
pinctrl_hsi1ufs: pinctrl@11060000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x0 0x11060000 0x0 0x1000>;
};
pinctrl_hsi1: pinctrl@11240000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x0 0x11240000 0x0 0x1000>;
};
cmu_peric2: clock-controller@11c00000 {
compatible = "samsung,exynos2200-cmu-peric2";
reg = <0x0 0x11c00000 0x0 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top CLK_DOUT_CMU_PERIC2_NOC>,
<&cmu_top CLK_DOUT_CMU_PERIC2_IP0>,
<&cmu_top CLK_DOUT_CMU_PERIC2_IP1>;
clock-names = "oscclk", "noc", "ip0", "ip1";
};
syscon_peric2: syscon@11c20000 {
compatible = "samsung,exynos2200-peric2-sysreg", "syscon";
reg = <0x0 0x11c20000 0x0 0x4000>;
};
pinctrl_peric2: pinctrl@11c30000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x0 0x11c30000 0x0 0x1000>;
};
cmu_cmgp: clock-controller@14e00000 {
compatible = "samsung,exynos2200-cmu-cmgp";
reg = <0x0 0x14e00000 0x0 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_alive CLK_DOUT_ALIVE_CMGP_NOC>,
<&cmu_alive CLK_DOUT_ALIVE_CMGP_PERI>;
clock-names = "oscclk", "noc", "peri";
};
syscon_cmgp: syscon@14e20000 {
compatible = "samsung,exynos2200-cmgp-sysreg", "syscon";
reg = <0x0 0x14e20000 0x0 0x2000>;
};
pinctrl_cmgp: pinctrl@14e30000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x0 0x14e30000 0x0 0x1000>;
wakeup-interrupt-controller {
compatible = "samsung,exynos2200-wakeup-eint",
"samsung,exynos850-wakeup-eint",
"samsung,exynos7-wakeup-eint";
};
};
cmu_vts: clock-controller@15300000 {
compatible = "samsung,exynos2200-cmu-vts";
reg = <0x0 0x15300000 0x0 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top CLK_DOUT_CMU_VTS_DMIC>;
clock-names = "oscclk", "dmic";
};
pinctrl_vts: pinctrl@15320000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x0 0x15320000 0x0 0x1000>;
};
cmu_alive: clock-controller@15800000 {
compatible = "samsung,exynos2200-cmu-alive";
reg = <0x0 0x15800000 0x0 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top CLK_DOUT_CMU_ALIVE_NOC>;
clock-names = "oscclk", "noc";
};
pinctrl_alive: pinctrl@15850000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x0 0x15850000 0x0 0x1000>;
wakeup-interrupt-controller {
compatible = "samsung,exynos2200-wakeup-eint",
"samsung,exynos850-wakeup-eint",
"samsung,exynos7-wakeup-eint";
};
};
pmu_system_controller: system-controller@15860000 {
compatible = "samsung,exynos2200-pmu",
"samsung,exynos7-pmu", "syscon";
reg = <0x0 0x15860000 0x0 0x10000>;
reboot: syscon-reboot {
compatible = "syscon-reboot";
offset = <0x3c00>; /* SYSTEM_CONFIGURATION */
mask = <0x2>; /* SWRESET_SYSTEM */
value = <0x2>; /* reset value */
};
};
cmu_top: clock-controller@1a320000 {
compatible = "samsung,exynos2200-cmu-top";
reg = <0x0 0x1a320000 0x0 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>;
clock-names = "oscclk";
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
/*
* Non-updatable, broken stock Samsung bootloader does not
* configure CNTFRQ_EL0
*/
clock-frequency = <25600000>;
};
};
#include "exynos2200-pinctrl.dtsi"

2
arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
View File

@@ -85,7 +85,7 @@ homepage-key {
};
};
i2c_max98504: i2c-gpio-0 {
i2c_max98504: i2c-13 {
compatible = "i2c-gpio";
sda-gpios = <&gpd0 1 GPIO_ACTIVE_HIGH>;
scl-gpios = <&gpd0 0 GPIO_ACTIVE_HIGH>;

2
arch/arm64/boot/dts/exynos/exynos7870-j6lte.dts
View File

@@ -89,7 +89,7 @@ key-volup {
memory@40000000 {
device_type = "memory";
reg = <0x0 0x40000000 0x3d800000>,
<0x0 0x80000000 0x7d800000>;
<0x0 0x80000000 0x40000000>;
};
pwrseq_mmc1: pwrseq-mmc1 {

2
arch/arm64/boot/dts/exynos/exynos7870-on7xelte.dts
View File

@@ -78,7 +78,7 @@ key-volup {
memory@40000000 {
device_type = "memory";
reg = <0x0 0x40000000 0x3e400000>,
<0x0 0x80000000 0xbe400000>;
<0x0 0x80000000 0x80000000>;
};
pwrseq_mmc1: pwrseq-mmc1 {

1
arch/arm64/boot/dts/exynos/exynos7870.dtsi
View File

@@ -327,6 +327,7 @@ usb@0 {
phys = <&usbdrd_phy 0>;
usb-role-switch;
snps,usb2-gadget-lpm-disable;
};
};

378
arch/arm64/boot/dts/exynos/exynosautov920.dtsi
View File

@@ -455,6 +455,26 @@ serial_0: serial@10880000 {
samsung,uart-fifosize = <256>;
status = "disabled";
};
spi_0: spi@10880000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x10880000 0x30>;
interrupts = <GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi0_bus &spi0_cs_func>;
clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
<&cmu_peric0 CLK_DOUT_PERIC0_USI00_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 1>, <&pdma0 0>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <256>;
status = "disabled";
};
};
usi_1: usi@108a00c0 {
@@ -484,6 +504,26 @@ serial_1: serial@108a0000 {
samsung,uart-fifosize = <256>;
status = "disabled";
};
spi_1: spi@108a0000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x108a0000 0x30>;
interrupts = <GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi1_bus &spi1_cs_func>;
clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
<&cmu_peric0 CLK_DOUT_PERIC0_USI01_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 3>, <&pdma0 2>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <256>;
status = "disabled";
};
};
usi_2: usi@108c00c0 {
@@ -513,6 +553,26 @@ serial_2: serial@108c0000 {
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_2: spi@108c0000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x108c0000 0x30>;
interrupts = <GIC_SPI 768 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi2_bus &spi2_cs_func>;
clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
<&cmu_peric0 CLK_DOUT_PERIC0_USI02_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 5>, <&pdma0 4>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
};
usi_3: usi@108e00c0 {
@@ -542,6 +602,26 @@ serial_3: serial@108e0000 {
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_3: spi@108e0000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x108e0000 0x30>;
interrupts = <GIC_SPI 770 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi3_bus &spi3_cs_func>;
clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
<&cmu_peric0 CLK_DOUT_PERIC0_USI03_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 7>, <&pdma0 6>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
};
usi_4: usi@109000c0 {
@@ -571,6 +651,26 @@ serial_4: serial@10900000 {
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_4: spi@10900000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x10900000 0x30>;
interrupts = <GIC_SPI 772 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi4_bus &spi4_cs_func>;
clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
<&cmu_peric0 CLK_DOUT_PERIC0_USI04_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 9>, <&pdma0 8>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
};
usi_5: usi@109200c0 {
@@ -600,6 +700,26 @@ serial_5: serial@10920000 {
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_5: spi@10920000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x10920000 0x30>;
interrupts = <GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi5_bus &spi5_cs_func>;
clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
<&cmu_peric0 CLK_DOUT_PERIC0_USI05_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 11>, <&pdma0 10>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
};
usi_6: usi@109400c0 {
@@ -629,6 +749,26 @@ serial_6: serial@10940000 {
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_6: spi@10940000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x10940000 0x30>;
interrupts = <GIC_SPI 776 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi6_bus &spi6_cs_func>;
clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
<&cmu_peric0 CLK_DOUT_PERIC0_USI06_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 13>, <&pdma0 12>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
};
usi_7: usi@109600c0 {
@@ -658,6 +798,26 @@ serial_7: serial@10960000 {
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_7: spi@10960000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x10960000 0x30>;
interrupts = <GIC_SPI 778 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi7_bus &spi7_cs_func>;
clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
<&cmu_peric0 CLK_DOUT_PERIC0_USI07_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 15>, <&pdma0 14>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
};
usi_8: usi@109800c0 {
@@ -687,6 +847,27 @@ serial_8: serial@10980000 {
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_8: spi@10980000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x10980000 0x30>;
interrupts = <GIC_SPI 780 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi8_bus &spi8_cs_func>;
clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
<&cmu_peric0 CLK_DOUT_PERIC0_USI08_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 17>, <&pdma0 16>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
};
pwm: pwm@109b0000 {
@@ -752,6 +933,26 @@ serial_9: serial@10c8000 {
samsung,uart-fifosize = <256>;
status = "disabled";
};
spi_9: spi@10c80000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x10c80000 0x30>;
interrupts = <GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi9_bus &spi9_cs_func>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI09_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma1 1>, <&pdma1 0>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <256>;
status = "disabled";
};
};
usi_10: usi@10ca00c0 {
@@ -781,6 +982,26 @@ serial_10: serial@10ca0000 {
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_10: spi@10ca0000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x10ca0000 0x30>;
interrupts = <GIC_SPI 789 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi10_bus &spi10_cs_func>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI10_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma1 3>, <&pdma1 2>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
};
usi_11: usi@10cc00c0 {
@@ -810,6 +1031,26 @@ serial_11: serial@10cc0000 {
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_11: spi@10cc0000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x10cc0000 0x30>;
interrupts = <GIC_SPI 791 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi11_bus &spi11_cs_func>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI11_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma1 5>, <&pdma1 4>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
};
usi_12: usi@10ce00c0 {
@@ -839,6 +1080,26 @@ serial_12: serial@10ce0000 {
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_12: spi@10ce0000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x10ce0000 0x30>;
interrupts = <GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi12_bus &spi12_cs_func>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI12_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma1 7>, <&pdma1 6>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
};
usi_13: usi@10d000c0 {
@@ -868,6 +1129,26 @@ serial_13: serial@10d00000 {
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_13: spi@10d00000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x10d00000 0x30>;
interrupts = <GIC_SPI 795 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi13_bus &spi13_cs_func>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI13_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma1 9>, <&pdma1 8>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
};
usi_14: usi@10d200c0 {
@@ -897,6 +1178,26 @@ serial_14: serial@10d20000 {
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_14: spi@10d20000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x10d20000 0x30>;
interrupts = <GIC_SPI 797 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi14_bus &spi14_cs_func>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI14_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma1 11>, <&pdma1 10>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
};
usi_15: usi@10d400c0 {
@@ -926,6 +1227,26 @@ serial_15: serial@10d40000 {
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_15: spi@10d40000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x10d40000 0x30>;
interrupts = <GIC_SPI 799 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi15_bus &spi15_cs_func>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI15_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma1 13>, <&pdma1 12>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
};
usi_16: usi@10d600c0 {
@@ -955,6 +1276,26 @@ serial_16: serial@10d60000 {
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_16: spi@10d60000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x10d60000 0x30>;
interrupts = <GIC_SPI 801 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi16_bus &spi16_cs_func>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI16_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma1 15>, <&pdma1 14>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
};
usi_17: usi@10d800c0 {
@@ -984,6 +1325,26 @@ serial_17: serial@10d80000 {
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_17: spi@10d80000 {
compatible = "samsung,exynosautov920-spi",
"samsung,exynos850-spi";
reg = <0x10d80000 0x30>;
interrupts = <GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi17_bus &spi17_cs_func>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI17_USI>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
dmas = <&pdma1 17>, <&pdma1 16>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <64>;
status = "disabled";
};
};
cmu_top: clock-controller@11000000 {
@@ -1048,6 +1409,23 @@ pinctrl_hsi1: pinctrl@16450000 {
interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>;
};
cmu_hsi2: clock-controller@16b00000 {
compatible = "samsung,exynosautov920-cmu-hsi2";
reg = <0x16b00000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top DOUT_CLKCMU_HSI2_NOC>,
<&cmu_top DOUT_CLKCMU_HSI2_NOC_UFS>,
<&cmu_top DOUT_CLKCMU_HSI2_UFS_EMBD>,
<&cmu_top DOUT_CLKCMU_HSI2_ETHERNET>;
clock-names = "oscclk",
"noc",
"ufs",
"embd",
"ethernet";
};
pinctrl_hsi2: pinctrl@16c10000 {
compatible = "samsung,exynosautov920-pinctrl";
reg = <0x16c10000 0x10000>;

96
arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi
View File

@@ -60,6 +60,21 @@ button-power {
};
};
reboot-mode {
compatible = "nvmem-reboot-mode";
nvmem-cells = <&nvmem_reboot_mode>;
nvmem-cell-names = "reboot-mode";
mode-bootloader = <0x800000fc>;
mode-charge = <0x8000000a>;
mode-dm-verity-device-corrupted = <0x80000050>;
mode-fastboot = <0x800000fa>;
mode-reboot-ab-update = <0x80000052>;
mode-recovery = <0x800000ff>;
mode-rescue = <0x800000f9>;
mode-shutdown-thermal = <0x80000051>;
mode-shutdown-thermal-battery = <0x80000051>;
};
/* TODO: Remove this once PMIC is implemented */
reg_placeholder: regulator-0 {
compatible = "regulator-fixed";
@@ -85,6 +100,20 @@ cont_splash_mem: splash@fac00000 {
};
};
&acpm_ipc {
pmic {
compatible = "samsung,s2mpg10-pmic";
interrupts-extended = <&gpa0 6 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int>;
system-power-controller;
wakeup-source;
regulators {
};
};
};
&ext_24_5m {
clock-frequency = <24576000>;
};
@@ -188,6 +217,60 @@ usbc0_role_sw: endpoint {
};
};
};
pmic@66 {
compatible = "maxim,max77759";
reg = <0x66>;
pinctrl-0 = <&if_pmic_int>;
pinctrl-names = "default";
interrupts-extended = <&gpa8 3 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <2>;
gpio {
compatible = "maxim,max77759-gpio";
gpio-controller;
#gpio-cells = <2>;
/*
* "Human-readable name [SIGNAL_LABEL]" where the
* latter comes from the schematic
*/
gpio-line-names = "OTG boost [OTG_BOOST_EN]",
"max20339 IRQ [MW_OVP_INT_L]";
interrupt-controller;
#interrupt-cells = <2>;
};
nvmem-0 {
compatible = "maxim,max77759-nvmem";
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
nvmem_reboot_mode: reboot-mode@0 {
reg = <0x0 0x4>;
};
boot-reason@4 {
reg = <0x4 0x4>;
};
shutdown-user-flag@8 {
reg = <0x8 0x1>;
};
rsoc@a {
reg = <0xa 0x2>;
};
};
};
};
};
&pinctrl_far_alive {
@@ -211,9 +294,22 @@ typec_int: typec-int-pins {
samsung,pin-pud = <GS101_PIN_PULL_UP>;
samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
};
if_pmic_int: if-pmic-int-pins {
samsung,pins = "gpa8-3";
samsung,pin-function = <GS101_PIN_FUNC_EINT>;
samsung,pin-pud = <GS101_PIN_PULL_UP>;
samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
};
};
&pinctrl_gpio_alive {
pmic_int: pmic-int-pins {
samsung,pins = "gpa0-6";
samsung,pin-function = <GS101_PIN_FUNC_EINT>;
samsung,pin-pud = <GS101_PIN_PULL_NONE>;
};
key_power: key-power-pins {
samsung,pins = "gpa10-1";
samsung,pin-function = <GS101_PIN_FUNC_EINT>;

10
arch/arm64/boot/dts/exynos/google/gs101.dtsi
View File

@@ -155,6 +155,7 @@ ananke_cpu_sleep: cpu-ananke-sleep {
idle-state-name = "c2";
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
local-timer-stop;
entry-latency-us = <70>;
exit-latency-us = <160>;
min-residency-us = <2000>;
@@ -164,6 +165,7 @@ enyo_cpu_sleep: cpu-enyo-sleep {
idle-state-name = "c2";
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
local-timer-stop;
entry-latency-us = <150>;
exit-latency-us = <190>;
min-residency-us = <2500>;
@@ -173,6 +175,7 @@ hera_cpu_sleep: cpu-hera-sleep {
idle-state-name = "c2";
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
local-timer-stop;
entry-latency-us = <235>;
exit-latency-us = <220>;
min-residency-us = <3500>;
@@ -1368,6 +1371,7 @@ ufs_0: ufs@14700000 {
<&cmu_hsi2 CLK_GOUT_HSI2_SYSREG_HSI2_PCLK>;
clock-names = "core_clk", "sclk_unipro_main", "fmp",
"aclk", "pclk", "sysreg";
dma-coherent;
freq-table-hz = <0 0>, <0 0>, <0 0>, <0 0>, <0 0>, <0 0>;
pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
pinctrl-names = "default";
@@ -1415,10 +1419,7 @@ poweroff: syscon-poweroff {
};
reboot: syscon-reboot {
compatible = "syscon-reboot";
offset = <0x3a00>; /* SYSTEM_CONFIGURATION */
mask = <0x2>; /* SWRESET_SYSTEM */
value = <0x2>; /* reset value */
compatible = "google,gs101-reboot";
};
reboot-mode {
@@ -1426,6 +1427,7 @@ reboot-mode {
offset = <0x0810>; /* EXYNOS_PMU_SYSIP_DAT0 */
mode-bootloader = <0xfc>;
mode-charge = <0x0a>;
mode-dm-verity-device-corrupted = <0x50>;
mode-fastboot = <0xfa>;
mode-reboot-ab-update = <0x52>;
mode-recovery = <0xff>;