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arm64: dts: mediatek: replace underscores in node names

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Underscores should not be used in node names (dtc with W=2 warns about
them), so replace them with hyphens.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240213144626.341463-1-krzysztof.kozlowski@linaro.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
This commit is contained in:
Krzysztof Kozlowski
2024-02-13 15:46:26 +01:00
committed by AngeloGioacchino Del Regno
parent 1af98c3e53
commit e630c7b0b6
8 changed files with 15 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/mediatek/mt2712e.dtsi
View File

@@ -261,7 +261,7 @@ pericfg: syscon@10003000 {
#clock-cells = <1>;
};
syscfg_pctl_a: syscfg_pctl_a@10005000 {
syscfg_pctl_a: syscon@10005000 {
compatible = "mediatek,mt2712-pctl-a-syscfg", "syscon";
reg = <0 0x10005000 0 0x1000>;
};

8
arch/arm64/boot/dts/mediatek/mt6797.dtsi
View File

@@ -117,7 +117,7 @@ topckgen: topckgen@10000000 {
#clock-cells = <1>;
};
infrasys: infracfg_ao@10001000 {
infrasys: syscon@10001000 {
compatible = "mediatek,mt6797-infracfg", "syscon";
reg = <0 0x10001000 0 0x1000>;
#clock-cells = <1>;
@@ -452,19 +452,19 @@ mmsys: syscon@14000000 {
#clock-cells = <1>;
};
imgsys: imgsys_config@15000000 {
imgsys: syscon@15000000 {
compatible = "mediatek,mt6797-imgsys", "syscon";
reg = <0 0x15000000 0 0x1000>;
#clock-cells = <1>;
};
vdecsys: vdec_gcon@16000000 {
vdecsys: syscon@16000000 {
compatible = "mediatek,mt6797-vdecsys", "syscon";
reg = <0 0x16000000 0 0x10000>;
#clock-cells = <1>;
};
vencsys: venc_gcon@17000000 {
vencsys: syscon@17000000 {
compatible = "mediatek,mt6797-vencsys", "syscon";
reg = <0 0x17000000 0 0x1000>;
#clock-cells = <1>;

2
arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-nand.dtso
View File

@@ -15,7 +15,7 @@ fragment@0 {
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
spi_nand: spi_nand@0 {
spi_nand: flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <10000000>;

2
arch/arm64/boot/dts/mediatek/mt8173-elm-hana-rev7.dts
View File

@@ -14,7 +14,7 @@ / {
&cpu_thermal {
trips {
cpu_crit: cpu_crit0 {
cpu_crit: cpu-crit0 {
temperature = <100000>;
type = "critical";
};

2
arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi
View File

@@ -1135,7 +1135,7 @@ rtc: mt6397rtc {
compatible = "mediatek,mt6397-rtc";
};
syscfg_pctl_pmic: syscfg_pctl_pmic@c000 {
syscfg_pctl_pmic: syscon@c000 {
compatible = "mediatek,mt6397-pctl-pmic-syscfg",
"syscon";
reg = <0 0x0000c000 0 0x0108>;

10
arch/arm64/boot/dts/mediatek/mt8173.dtsi
View File

@@ -222,14 +222,14 @@ CPU_SLEEP_0: cpu-sleep-0 {
};
};
pmu_a53 {
pmu-a53 {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 9 IRQ_TYPE_LEVEL_LOW>;
interrupt-affinity = <&cpu0>, <&cpu1>;
};
pmu_a72 {
pmu-a72 {
compatible = "arm,cortex-a72-pmu";
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_LOW>;
@@ -286,7 +286,7 @@ target: trip-point1 {
type = "passive";
};
cpu_crit: cpu_crit0 {
cpu_crit: cpu-crit0 {
temperature = <115000>;
hysteresis = <2000>;
type = "critical";
@@ -318,7 +318,7 @@ reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
vpu_dma_reserved: vpu_dma_mem_region@b7000000 {
vpu_dma_reserved: vpu-dma-mem@b7000000 {
compatible = "shared-dma-pool";
reg = <0 0xb7000000 0 0x500000>;
alignment = <0x1000>;
@@ -366,7 +366,7 @@ pericfg: power-controller@10003000 {
#reset-cells = <1>;
};
syscfg_pctl_a: syscfg_pctl_a@10005000 {
syscfg_pctl_a: syscon@10005000 {
compatible = "mediatek,mt8173-pctl-a-syscfg", "syscon";
reg = <0 0x10005000 0 0x1000>;
};

2
arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts
View File

@@ -33,7 +33,7 @@ reserved-memory {
#size-cells = <2>;
ranges;
scp_mem_reserved: scp_mem_region@50000000 {
scp_mem_reserved: scp-mem@50000000 {
compatible = "shared-dma-pool";
reg = <0 0x50000000 0 0x2900000>;
no-map;

2
arch/arm64/boot/dts/mediatek/mt8183.dtsi
View File

@@ -1964,7 +1964,7 @@ larb4: larb@17010000 {
power-domains = <&spm MT8183_POWER_DOMAIN_VENC>;
};
venc_jpg: venc_jpg@17030000 {
venc_jpg: jpeg-encoder@17030000 {
compatible = "mediatek,mt8183-jpgenc", "mediatek,mtk-jpgenc";
reg = <0 0x17030000 0 0x1000>;
interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_LOW>;