drm/amdgpu: simplify VCN reset helper

Remove the wrapper function.

Reviewed-by: Jesse Zhang <jesse.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher
2026-01-13 15:25:10 -05:00
parent c184df870d
commit e614d6054b

View File

@@ -1486,19 +1486,27 @@ int vcn_set_powergating_state(struct amdgpu_ip_block *ip_block,
}
/**
* amdgpu_vcn_reset_engine - Reset a specific VCN engine
* @ring: Pointer to the VCN ring
* @timedout_fence: fence that timed out
* amdgpu_vcn_ring_reset - Reset a VCN ring
* @ring: ring to reset
* @vmid: vmid of guilty job
* @timedout_fence: fence of timed out job
*
* This helper is for VCN blocks without unified queues because
* resetting the engine resets all queues in that case. With
* unified queues we have one queue per engine.
* Returns: 0 on success, or a negative error code on failure.
*/
static int amdgpu_vcn_reset_engine(struct amdgpu_ring *ring,
struct amdgpu_fence *timedout_fence)
int amdgpu_vcn_ring_reset(struct amdgpu_ring *ring,
unsigned int vmid,
struct amdgpu_fence *timedout_fence)
{
struct amdgpu_device *adev = ring->adev;
struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[ring->me];
int r, i;
if (adev->vcn.inst[ring->me].using_unified_queue)
return -EINVAL;
mutex_lock(&vinst->engine_reset_mutex);
/* Stop the scheduler's work queue for the dec and enc rings if they are running.
* This ensures that no new tasks are submitted to the queues while
@@ -1542,29 +1550,6 @@ static int amdgpu_vcn_reset_engine(struct amdgpu_ring *ring,
return r;
}
/**
* amdgpu_vcn_ring_reset - Reset a VCN ring
* @ring: ring to reset
* @vmid: vmid of guilty job
* @timedout_fence: fence of timed out job
*
* This helper is for VCN blocks without unified queues because
* resetting the engine resets all queues in that case. With
* unified queues we have one queue per engine.
* Returns: 0 on success, or a negative error code on failure.
*/
int amdgpu_vcn_ring_reset(struct amdgpu_ring *ring,
unsigned int vmid,
struct amdgpu_fence *timedout_fence)
{
struct amdgpu_device *adev = ring->adev;
if (adev->vcn.inst[ring->me].using_unified_queue)
return -EINVAL;
return amdgpu_vcn_reset_engine(ring, timedout_fence);
}
int amdgpu_vcn_reg_dump_init(struct amdgpu_device *adev,
const struct amdgpu_hwip_reg_entry *reg, u32 count)
{