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RDMA/efa: Add CQ/QP creation with 64-bit SQ req ID support

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Add the support needed to propagate the user requested flags to config
the CQ/QP to support 64-bit SQ request ID to the device.

Reviewed-by: Michael Margolin <mrgolin@amazon.com>
Reviewed-by: Tom Sela <tomsela@amazon.com>
Signed-off-by: Yonatan Nachum <ynachum@amazon.com>
Link: https://patch.msgid.link/20260722113331.2515247-2-ynachum@amazon.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
This commit is contained in:
Yonatan Nachum
2026-07-22 11:33:30 +00:00
committed by Leon Romanovsky
parent 9b66c9af71
commit e5e8706dca
6 changed files with 47 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
drivers/infiniband/hw/efa/efa_admin_cmds_defs.h
View File

@@ -119,7 +119,10 @@ struct efa_admin_create_qp_cmd {
* 2 : unsolicited_write_recv - If set, work requests
* will not be consumed for incoming RDMA write with
* immediate
* 7:3 : reserved - MBZ
* 3 : sq_64_bit_req_id - If set, requests posted on
* SQ will use 64-bit ids. The corresponding CQ must
* also have 64-bit ids enabled.
* 7:4 : reserved - MBZ
*/
u8 flags;
@@ -523,7 +526,9 @@ struct efa_admin_create_cq_cmd {
* 5 : set_src_addr - If set, source address will be
* filled on RX completions from unknown senders.
* Requires 8 words CQ entry size.
* 7:6 : reserved7 - MBZ
* 6 : sq_comp_64_bit_req_id - If set, send
* completions will use 64-bit work request ids
* 7 : reserved7 - MBZ
*/
u8 cq_caps_2;
@@ -730,7 +735,10 @@ struct efa_admin_feature_device_attr_desc {
* write with imm. receive is supported
* 5 : event_counters - If set, event counters are
* supported
* 31:6 : reserved - MBZ
* 9:6 : reserved1 - MBZ
* 10 : sq_64_bit_req_id - If set, SQ can use 64-bit
* work request ids
* 31:11 : reserved2 - MBZ
*/
u32 device_caps;
@@ -1250,6 +1258,8 @@ struct efa_admin_modify_event_counter_resp {
#define EFA_ADMIN_CREATE_QP_CMD_SQ_VIRT_MASK BIT(0)
#define EFA_ADMIN_CREATE_QP_CMD_RQ_VIRT_MASK BIT(1)
#define EFA_ADMIN_CREATE_QP_CMD_UNSOLICITED_WRITE_RECV_MASK BIT(2)
#define EFA_ADMIN_CREATE_QP_CMD_SQ_64_BIT_REQ_ID_SHIFT 3
#define EFA_ADMIN_CREATE_QP_CMD_SQ_64_BIT_REQ_ID_MASK BIT(3)
/* modify_qp_cmd */
#define EFA_ADMIN_MODIFY_QP_CMD_QP_STATE_MASK BIT(0)
@@ -1276,6 +1286,8 @@ struct efa_admin_modify_event_counter_resp {
#define EFA_ADMIN_CREATE_CQ_CMD_VIRT_MASK BIT(6)
#define EFA_ADMIN_CREATE_CQ_CMD_CQ_ENTRY_SIZE_WORDS_MASK GENMASK(4, 0)
#define EFA_ADMIN_CREATE_CQ_CMD_SET_SRC_ADDR_MASK BIT(5)
#define EFA_ADMIN_CREATE_CQ_CMD_SQ_COMP_64_BIT_REQ_ID_SHIFT 6
#define EFA_ADMIN_CREATE_CQ_CMD_SQ_COMP_64_BIT_REQ_ID_MASK BIT(6)
/* create_cq_resp */
#define EFA_ADMIN_CREATE_CQ_RESP_DB_VALID_MASK BIT(0)
@@ -1287,6 +1299,8 @@ struct efa_admin_modify_event_counter_resp {
#define EFA_ADMIN_FEATURE_DEVICE_ATTR_DESC_RDMA_WRITE_MASK BIT(3)
#define EFA_ADMIN_FEATURE_DEVICE_ATTR_DESC_UNSOLICITED_WRITE_RECV_MASK BIT(4)
#define EFA_ADMIN_FEATURE_DEVICE_ATTR_DESC_EVENT_COUNTERS_MASK BIT(5)
#define EFA_ADMIN_FEATURE_DEVICE_ATTR_DESC_SQ_64_BIT_REQ_ID_SHIFT 10
#define EFA_ADMIN_FEATURE_DEVICE_ATTR_DESC_SQ_64_BIT_REQ_ID_MASK BIT(10)
/* feature_queue_attr_desc_2 */
#define EFA_ADMIN_FEATURE_QUEUE_ATTR_DESC_2_SEND_COMP_MASK BIT(0)

8
drivers/infiniband/hw/efa/efa_com_cmd.c
View File

@@ -38,6 +38,9 @@ int efa_com_create_qp(struct efa_com_dev *edev,
if (params->unsolicited_write_recv)
EFA_SET(&create_qp_cmd.flags, EFA_ADMIN_CREATE_QP_CMD_UNSOLICITED_WRITE_RECV, 1);
if (params->sq_64_bit_req_id)
EFA_SET(&create_qp_cmd.flags, EFA_ADMIN_CREATE_QP_CMD_SQ_64_BIT_REQ_ID, 1);
err = efa_com_cmd_exec(aq,
(struct efa_admin_aq_entry *)&create_qp_cmd,
sizeof(create_qp_cmd),
@@ -178,6 +181,11 @@ int efa_com_create_cq(struct efa_com_dev *edev,
EFA_SET(&create_cmd.cq_caps_2,
EFA_ADMIN_CREATE_CQ_CMD_SET_SRC_ADDR, 1);
}
if (params->sq_comp_64_bit_req_id) {
EFA_SET(&create_cmd.cq_caps_2,
EFA_ADMIN_CREATE_CQ_CMD_SQ_COMP_64_BIT_REQ_ID, 1);
}
efa_com_set_dma_addr(params->dma_addr,
&create_cmd.cq_ba.mem_addr_high,
&create_cmd.cq_ba.mem_addr_low);

2
drivers/infiniband/hw/efa/efa_com_cmd.h
View File

@@ -29,6 +29,7 @@ struct efa_com_create_qp_params {
u8 qp_type;
u8 sl;
u8 unsolicited_write_recv : 1;
u8 sq_64_bit_req_id : 1;
};
struct efa_com_create_qp_result {
@@ -79,6 +80,7 @@ struct efa_com_create_cq_params {
u8 entry_size_in_bytes;
u8 interrupt_mode_enabled : 1;
u8 set_src_addr : 1;
u8 sq_comp_64_bit_req_id : 1;
};
struct efa_com_create_cq_result {

12
drivers/infiniband/hw/efa/efa_io_defs.h
View File

@@ -79,6 +79,10 @@ enum efa_io_processing_hint {
EFA_IO_PROCESSING_HINT_BURST_PPS_SENSITIVE = 1 << 0,
};
struct efa_io_req_id_ex {
u16 w[3];
};
struct efa_io_tx_meta_desc {
/* Verbs-generated Request ID */
u16 req_id;
@@ -141,7 +145,9 @@ struct efa_io_tx_meta_desc {
/* Queue key */
u32 qkey;
u8 reserved2[12];
u8 reserved2[6];
struct efa_io_req_id_ex req_id_ex;
};
/*
@@ -327,8 +333,10 @@ struct efa_io_tx_cdesc {
/* Common completion info */
struct efa_io_cdesc_common common;
struct efa_io_req_id_ex req_id_ex;
/* MBZ */
u16 reserved16;
u8 reserved[4];
};
/* Rx Completion Descriptor */

7
drivers/infiniband/hw/efa/efa_verbs.c
View File

@@ -719,6 +719,9 @@ int efa_create_qp(struct ib_qp *ibqp, struct ib_qp_init_attr *init_attr,
if (EFA_DEV_CAP(dev, UNSOLICITED_WRITE_RECV))
supported_efa_flags |= EFA_CREATE_QP_WITH_UNSOLICITED_WRITE_RECV;
if (EFA_DEV_CAP(dev, SQ_64_BIT_REQ_ID))
supported_efa_flags |= EFA_CREATE_QP_WITH_SQ_64_BIT_REQ_ID;
if (cmd.flags & ~supported_efa_flags) {
ibdev_dbg(&dev->ibdev, "Unsupported EFA QP create flags[%#x], supported[%#x]\n",
cmd.flags, supported_efa_flags);
@@ -778,6 +781,9 @@ int efa_create_qp(struct ib_qp *ibqp, struct ib_qp_init_attr *init_attr,
if (cmd.flags & EFA_CREATE_QP_WITH_UNSOLICITED_WRITE_RECV)
create_qp_params.unsolicited_write_recv = true;
if (cmd.flags & EFA_CREATE_QP_WITH_SQ_64_BIT_REQ_ID)
create_qp_params.sq_64_bit_req_id = true;
err = efa_com_create_qp(&dev->edev, &create_qp_params,
&create_qp_resp);
if (err)
@@ -1212,6 +1218,7 @@ int efa_create_user_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr,
params.entry_size_in_bytes = cmd.cq_entry_size;
params.num_sub_cqs = cmd.num_sub_cqs;
params.set_src_addr = set_src_addr;
params.sq_comp_64_bit_req_id = !!(cmd.flags & EFA_CREATE_CQ_WITH_SQ_COMP_64_BIT_REQ_ID);
if (cmd.flags & EFA_CREATE_CQ_WITH_COMPLETION_CHANNEL) {
cq->eq = efa_vec2eq(dev, attr->comp_vector);
params.eqn = cq->eq->eeq.eqn;

4
include/uapi/rdma/efa-abi.h
View File

@@ -56,7 +56,8 @@ struct efa_ibv_alloc_pd_resp {
enum {
EFA_CREATE_CQ_WITH_COMPLETION_CHANNEL = 1 << 0,
EFA_CREATE_CQ_WITH_SGID = 1 << 1,
EFA_CREATE_CQ_WITH_SGID = 1 << 1,
EFA_CREATE_CQ_WITH_SQ_COMP_64_BIT_REQ_ID = 1 << 2,
};
struct efa_ibv_create_cq {
@@ -88,6 +89,7 @@ enum {
enum {
EFA_CREATE_QP_WITH_UNSOLICITED_WRITE_RECV = 1 << 0,
EFA_CREATE_QP_WITH_SQ_64_BIT_REQ_ID = 1 << 1,
};
struct efa_ibv_create_qp {