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drm/dp: Add the DPCD register required for Extended wake timeout

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Add DPCD registers required to configure Extended Wake Timeout
for LTTPR.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250122053358.1545039-2-suraj.kandpal@intel.com
This commit is contained in:
Suraj Kandpal
2025-01-22 11:03:56 +05:30
parent 0c5f9cb678
commit e5e8367d25
1 changed files with 14 additions and 0 deletions
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14
include/drm/display/drm_dp.h
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@@ -696,6 +696,9 @@
#define DP_UPSTREAM_DEVICE_DP_PWR_NEED 0x118 /* 1.2 */
# define DP_PWR_NOT_NEEDED (1 << 0)
#define DP_EXTENDED_DPRX_SLEEP_WAKE_TIMEOUT_GRANT 0x119 /* 1.4a */
# define DP_DPRX_SLEEP_WAKE_TIMEOUT_PERIOD_GRANTED (1 << 0)
#define DP_FEC_CONFIGURATION 0x120 /* 1.4 */
# define DP_FEC_READY (1 << 0)
# define DP_FEC_ERR_COUNT_SEL_MASK (7 << 1)
@@ -1168,6 +1171,15 @@
# define DP_VSC_EXT_CEA_SDP_SUPPORTED (1 << 6) /* DP 1.4 */
# define DP_VSC_EXT_CEA_SDP_CHAINING_SUPPORTED (1 << 7) /* DP 1.4 */
#define DP_EXTENDED_DPRX_SLEEP_WAKE_TIMEOUT_REQUEST 0x2211 /* 1.4a */
# define DP_DPRX_SLEEP_WAKE_TIMEOUT_PERIOD_MASK 0xff
# define DP_DPRX_SLEEP_WAKE_TIMEOUT_PERIOD_1_MS 0x00
# define DP_DPRX_SLEEP_WAKE_TIMEOUT_PERIOD_20_MS 0x01
# define DP_DPRX_SLEEP_WAKE_TIMEOUT_PERIOD_40_MS 0x02
# define DP_DPRX_SLEEP_WAKE_TIMEOUT_PERIOD_60_MS 0x03
# define DP_DPRX_SLEEP_WAKE_TIMEOUT_PERIOD_80_MS 0x04
# define DP_DPRX_SLEEP_WAKE_TIMEOUT_PERIOD_100_MS 0x05
#define DP_DPRX_FEATURE_ENUMERATION_LIST_CONT_1 0x2214 /* 2.0 E11 */
# define DP_ADAPTIVE_SYNC_SDP_SUPPORTED (1 << 0)
# define DP_ADAPTIVE_SYNC_SDP_OPERATION_MODE GENMASK(1, 0)
@@ -1473,6 +1485,8 @@
#define DP_MAX_LANE_COUNT_PHY_REPEATER 0xf0004 /* 1.4a */
#define DP_Repeater_FEC_CAPABILITY 0xf0004 /* 1.4 */
#define DP_PHY_REPEATER_EXTENDED_WAIT_TIMEOUT 0xf0005 /* 1.4a */
# define DP_EXTENDED_WAKE_TIMEOUT_REQUEST_MASK 0x7f
# define DP_EXTENDED_WAKE_TIMEOUT_GRANT (1 << 7)
#define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
# define DP_PHY_REPEATER_128B132B_SUPPORTED (1 << 0)
/* See DP_128B132B_SUPPORTED_LINK_RATES for values */