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clk: renesas: r8a779h0: Add ISP core clocks

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Add the ISP core module clock for Renesas R-Car V4M.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250114183005.2761213-4-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Niklas Söderlund
2025-01-14 19:30:05 +01:00
committed by Geert Uytterhoeven
parent d871a94062
commit e489f87bc1
1 changed files with 1 additions and 0 deletions
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1
drivers/clk/renesas/r8a779h0-cpg-mssr.c
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@@ -171,6 +171,7 @@ static const struct cpg_core_clk r8a779h0_core_clks[] __initconst = {
};
static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = {
DEF_MOD("isp0", 16, R8A779H0_CLK_S0D2_VIO),
DEF_MOD("avb0:rgmii0", 211, R8A779H0_CLK_S0D8_HSC),
DEF_MOD("avb1:rgmii1", 212, R8A779H0_CLK_S0D8_HSC),
DEF_MOD("avb2:rgmii2", 213, R8A779H0_CLK_S0D8_HSC),