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arm64: dts: rockchip: enable dwc3 on quartz64-a

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The quartz64 model a has support for both the dwc3 otg port and the dwc3
host port. Add the otg power supply and dwc3 nodes to the device tree to
enable support for these.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20220408151237.3165046-5-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Peter Geis
2022-04-08 11:12:36 -04:00
committed by Heiko Stuebner
parent 9f4c480f24
commit e432309ff8
1 changed files with 37 additions and 0 deletions
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37
arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
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@@ -151,6 +151,16 @@ vcc5v0_usb20_host: vcc5v0_usb20_host {
vin-supply = <&vcc5v0_usb>;
};
vcc5v0_usb20_otg: vcc5v0_usb20_otg {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
regulator-name = "vcc5v0_usb20_otg";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&dcdc_boost>;
};
vcc3v3_sd: vcc3v3_sd {
compatible = "regulator-fixed";
enable-active-low;
@@ -187,6 +197,10 @@ vcc_wl: vcc_wl {
};
};
&combphy1 {
status = "okay";
};
&cpu0 {
cpu-supply = <&vdd_cpu>;
};
@@ -672,6 +686,29 @@ &usb_host1_ohci {
status = "okay";
};
&usb_host0_xhci {
status = "okay";
};
/* usb3 controller is muxed with sata1 */
&usb_host1_xhci {
status = "okay";
};
&usb2phy0 {
status = "okay";
};
&usb2phy0_host {
phy-supply = <&vcc5v0_usb20_host>;
status = "okay";
};
&usb2phy0_otg {
phy-supply = <&vcc5v0_usb20_otg>;
status = "okay";
};
&usb2phy1 {
status = "okay";
};