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net: libwx: add support for set_coalesce in wx_ethtool_ops_vf
Add support for set_coalesce in wx_ethtool_ops_vf, which is used to set interrupt coalescing parameters. Update wx_write_eitr_vf() to use the same interrupt moderation encoding as PF devices, since PF and VF share the same register layout. And remove the now-unused WX_VXITR_MASK definition. Signed-off-by: Mengyuan Lou <mengyuanlou@net-swift.com> Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com> Link: https://patch.msgid.link/20260710015925.34769-3-mengyuanlou@net-swift.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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committed by
Jakub Kicinski
parent
0ce45ae881
commit
e424cd4626
@@ -10,6 +10,7 @@
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#include "wx_hw.h"
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#include "wx_lib.h"
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#include "wx_vf_common.h"
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#include "wx_vf_lib.h"
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struct wx_stats {
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char stat_string[ETH_GSTRING_LEN];
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@@ -488,7 +489,10 @@ int wx_set_coalesce(struct net_device *netdev,
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else
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/* rx only or mixed */
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q_vector->itr = rx_itr_param;
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wx_write_eitr(q_vector);
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if (wx->pdev->is_virtfn)
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wx_write_eitr_vf(q_vector);
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else
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wx_write_eitr(q_vector);
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}
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wx_update_rsc(wx);
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@@ -845,6 +849,7 @@ static const struct ethtool_ops wx_ethtool_ops_vf = {
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.set_ringparam = wx_set_ringparam_vf,
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.get_msglevel = wx_get_msglevel,
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.get_coalesce = wx_get_coalesce,
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.set_coalesce = wx_set_coalesce,
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.get_ts_info = ethtool_op_get_ts_info,
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.get_link_ksettings = wx_get_link_ksettings_vf,
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};
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@@ -41,7 +41,6 @@
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#define WX_VF_MAX_RX_QUEUES 4
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#define WX_VXITR(i) (0x200 + (4 * (i))) /* i=[0,1] */
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#define WX_VXITR_MASK GENMASK(8, 0)
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#define WX_VXITR_CNT_WDIS BIT(31)
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#define WX_VXIVAR_MISC 0x260
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#define WX_VXIVAR(i) (0x240 + (4 * (i))) /* i=[0,3] */
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@@ -16,7 +16,18 @@ void wx_write_eitr_vf(struct wx_q_vector *q_vector)
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int v_idx = q_vector->v_idx;
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u32 itr_reg;
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itr_reg = q_vector->itr & WX_VXITR_MASK;
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switch (wx->mac.type) {
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case wx_mac_sp:
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itr_reg = q_vector->itr & WX_SP_MAX_EITR;
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break;
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case wx_mac_aml:
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case wx_mac_aml40:
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itr_reg = (q_vector->itr >> 3) & WX_AML_MAX_EITR;
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break;
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default:
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itr_reg = q_vector->itr & WX_EM_MAX_EITR;
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break;
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}
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/* set the WDIS bit to not clear the timer bits and cause an
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* immediate assertion of the interrupt
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