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net: dsa: mv88e6xxx: add Amethyst specific SMI GPIO function
The existing mv88e6390_g2_scratch_gpio_set_smi() cannot be used on the 88E6393X as it requires certain P0_MODE, it also checks the CPU mode as it impacts the bit setting value. This is all irrelevant for Amethyst (MV88E6191X/6193X/6393X) as only the default value of the SMI_PHY Config bit is set to CPU_MGD bootstrap pin value but it can be changed without restrictions so that GPIO pins 9 and 10 are used as SMI pins. So, introduce Amethyst specific function and call that if the Amethyst family wants to setup the external PHY. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
committed by
Paolo Abeni
parent
5c5b0c444b
commit
e3ab3267a0
@@ -3712,7 +3712,10 @@ static int mv88e6xxx_mdio_register(struct mv88e6xxx_chip *chip,
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if (external) {
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mv88e6xxx_reg_lock(chip);
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err = mv88e6390_g2_scratch_gpio_set_smi(chip, true);
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if (chip->info->family == MV88E6XXX_FAMILY_6393)
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err = mv88e6393x_g2_scratch_gpio_set_smi(chip, true);
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else
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err = mv88e6390_g2_scratch_gpio_set_smi(chip, true);
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mv88e6xxx_reg_unlock(chip);
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if (err)
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@@ -380,6 +380,8 @@ extern const struct mv88e6xxx_gpio_ops mv88e6352_gpio_ops;
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int mv88e6390_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
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bool external);
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int mv88e6393x_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
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bool external);
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int mv88e6352_g2_scratch_port_has_serdes(struct mv88e6xxx_chip *chip, int port);
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int mv88e6xxx_g2_atu_stats_set(struct mv88e6xxx_chip *chip, u16 kind, u16 bin);
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int mv88e6xxx_g2_atu_stats_get(struct mv88e6xxx_chip *chip, u16 *stats);
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@@ -290,6 +290,37 @@ int mv88e6390_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
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return mv88e6xxx_g2_scratch_write(chip, misc_cfg, val);
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}
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/**
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* mv88e6393x_g2_scratch_gpio_set_smi - set gpio muxing for external smi
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* @chip: chip private data
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* @external: set mux for external smi, or free for gpio usage
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*
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* MV88E6191X/6193X/6393X GPIO pins 9 and 10 can be configured as an
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* external SMI interface or as regular GPIO-s.
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*
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* They however have a different register layout then the existing
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* function.
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*/
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int mv88e6393x_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
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bool external)
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{
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int misc_cfg = MV88E6352_G2_SCRATCH_MISC_CFG;
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int err;
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u8 val;
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err = mv88e6xxx_g2_scratch_read(chip, misc_cfg, &val);
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if (err)
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return err;
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if (external)
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val &= ~MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI;
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else
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val |= MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI;
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return mv88e6xxx_g2_scratch_write(chip, misc_cfg, val);
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}
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/**
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* mv88e6352_g2_scratch_port_has_serdes - indicate if a port can have a serdes
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* @chip: chip private data
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