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ARM: dts: amlogic: meson6: remove support for ATV1200 board

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The meson6 atv1200 has a lot of dtbs check errors, but since
no active contributor have any boards with Meson6 SoC, plus
no upstream GPIO, pinctrl, clock, MMC... for that SoC either,
let's start decommissioning Meson6 support by removing the Device
Tree files first then remove the MACH_MESON6 in a second time.

If someone is interested in Meson6 support they should bring it back
along with a few more patches for upstream support of further
peripherals.

Suggested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20240916-topic-amlogic-arm32-upstream-bindings-fixes-v2-4-0b20ed4f0571@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
This commit is contained in:
Neil Armstrong
2024-09-16 10:08:33 +02:00
parent e1d42e1167
commit e2a3f11ae1
3 changed files with 0 additions and 108 deletions
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2
arch/arm/boot/dts/amlogic/Makefile
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@@ -1,6 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_MACH_MESON6) += \
meson6-atv1200.dtb
dtb-$(CONFIG_MACH_MESON8) += \
meson8-minix-neo-x8.dtb \
meson8b-ec100.dtb \

33
arch/arm/boot/dts/amlogic/meson6-atv1200.dts
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@@ -1,33 +0,0 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Copyright 2014 Carlo Caione <carlo@caione.org>
*/
/dts-v1/;
#include "meson6.dtsi"
/ {
model = "Geniatech ATV1200";
compatible = "geniatech,atv1200", "amlogic,meson6";
aliases {
serial0 = &uart_AO;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
device_type = "memory";
reg = <0x40000000 0x80000000>;
};
};
&uart_AO {
status = "okay";
};
&ethmac {
status = "okay";
};

73
arch/arm/boot/dts/amlogic/meson6.dtsi
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@@ -1,73 +0,0 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Copyright 2014 Carlo Caione <carlo@caione.org>
*/
#include "meson.dtsi"
/ {
model = "Amlogic Meson6 SoC";
compatible = "amlogic,meson6";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
reg = <0x200>;
};
cpu@201 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
reg = <0x201>;
};
};
apb2: bus@d0000000 {
compatible = "simple-bus";
reg = <0xd0000000 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0xd0000000 0x40000>;
};
clk81: clk81 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <200000000>;
};
}; /* end of / */
&efuse {
status = "disabled";
};
&timer_abcde {
clocks = <&xtal>, <&clk81>;
clock-names = "xtal", "pclk";
};
&uart_AO {
clocks = <&xtal>, <&clk81>, <&clk81>;
clock-names = "xtal", "pclk", "baud";
};
&uart_A {
clocks = <&xtal>, <&clk81>, <&clk81>;
clock-names = "xtal", "pclk", "baud";
};
&uart_B {
clocks = <&xtal>, <&clk81>, <&clk81>;
clock-names = "xtal", "pclk", "baud";
};
&uart_C {
clocks = <&xtal>, <&clk81>, <&clk81>;
clock-names = "xtal", "pclk", "baud";
};