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drm/amd/display: make ODM segment width of YCbCr422 two pixel aligned

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[why]
In YCbCr422 format hardware shares 1 set of chromas CbCr with 2 sets of
lumas Y. Therefore each ODM segment needs to be two pixel aligned. The
commit adds this missing hardwware requirement into ODM segment width
decision logic.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Acked-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Wenjing Liu
2024-05-30 17:13:02 -04:00
committed by Alex Deucher
parent 4316107bd0
commit e27ffc2fe8
1 changed files with 11 additions and 4 deletions
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15
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
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@@ -2089,13 +2089,20 @@ int resource_get_odm_slice_dst_width(struct pipe_ctx *otg_master,
timing = &otg_master->stream->timing;
count = resource_get_odm_slice_count(otg_master);
h_active = timing->h_addressable +
timing->h_border_left +
timing->h_border_right;
timing->h_border_left +
timing->h_border_right;
width = h_active / count;
if (otg_master->stream_res.tg && otg_master->stream)
two_pixel_alignment_required = otg_master->stream_res.tg->funcs->is_two_pixels_per_container(timing);
two_pixel_alignment_required =
otg_master->stream_res.tg->funcs->is_two_pixels_per_container(timing) ||
/*
* 422 is sub-sampled horizontally. 1 set of chromas
* (Cb/Cr) is shared for 2 lumas (i.e 2 Y values).
* Therefore even if 422 is still 1 pixel per container,
* ODM segment width still needs to be 2 pixel aligned.
*/
timing->pixel_encoding == PIXEL_ENCODING_YCBCR422;
if ((width % 2) && two_pixel_alignment_required)
width++;