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pinctrl: qcom: eliza: Add missing sdc2 pin function mappings

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GPIOs 38, 39, 48 and 49 support the SDC2 DATA function, while
GPIO 51 supports SDC2 CMD and GPIO 62 supports SDC2 CLK.

However, the sdc2 pin function is not listed in the corresponding
pingroup definitions, preventing these pins from being muxed for
SDC2 operation.

Add the missing sdc2 function mappings.

Fixes: 6f26989e15 ("pinctrl: qcom: Add Eliza pinctrl driver")
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
Abel Vesa
2026-06-09 15:02:49 +03:00
committed by Linus Walleij
parent 84c0fe4a20
commit e191518a9e
1 changed files with 6 additions and 6 deletions
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12
drivers/pinctrl/qcom/pinctrl-eliza.c
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@@ -1402,8 +1402,8 @@ static const struct msm_pingroup eliza_groups[] = {
[35] = PINGROUP(35, qup1_se1, qup1_se5, tb_trig_sdc2, gcc_gp2, qdss_gpio_tracedata, _, _, _, _, _, _),
[36] = PINGROUP(36, qup1_se4_01, qup1_se4_23, ibi_i3c, _, _, _, _, _, _, _, _),
[37] = PINGROUP(37, qup1_se4_01, qup1_se4_23, ibi_i3c, _, _, _, _, _, _, _, _),
[38] = PINGROUP(38, _, _, _, _, _, _, _, _, _, _, _),
[39] = PINGROUP(39, _, _, _, _, _, _, _, _, _, _, _),
[38] = PINGROUP(38, sdc2, _, _, _, _, _, _, _, _, _, _),
[39] = PINGROUP(39, sdc2, _, _, _, _, _, _, _, _, _, _),
[40] = PINGROUP(40, qup1_se6, qup1_se2, qup1_se6_l3_mira, _, qdss_gpio_tracedata, gnss_adc1, ddr_pxi1, _, _, _, _),
[41] = PINGROUP(41, _, _, _, _, _, _, _, _, _, _, _),
[42] = PINGROUP(42, qup1_se6, qup1_se2, qup1_se6_l1_mira, qdss_gpio_tracedata, gnss_adc0, ddr_pxi1, _, _, _, _, _),
@@ -1412,10 +1412,10 @@ static const struct msm_pingroup eliza_groups[] = {
[45] = PINGROUP(45, qup1_se3, _, _, _, _, _, _, _, _, _, _),
[46] = PINGROUP(46, qup1_se3, hdmi_tx_cec, _, _, _, _, _, _, _, _, _),
[47] = PINGROUP(47, qup1_se3, hdmi_hot_plug, _, _, _, _, _, _, _, _, _),
[48] = PINGROUP(48, _, _, _, _, _, _, _, _, _, _, _),
[49] = PINGROUP(49, _, _, _, _, _, _, _, _, _, _, _),
[48] = PINGROUP(48, sdc2, _, _, _, _, _, _, _, _, _, _),
[49] = PINGROUP(49, sdc2, _, _, _, _, _, _, _, _, _, _),
[50] = PINGROUP(50, sdc2_fb_clk, _, _, _, _, _, _, _, _, _, _),
[51] = PINGROUP(51, _, _, _, _, _, _, _, _, _, _, _),
[51] = PINGROUP(51, sdc2, _, _, _, _, _, _, _, _, _, _),
[52] = PINGROUP(52, qup1_se2, pcie1_clk_req_n, qup1_se2_l2_mirb, ddr_bist_complete, qdss_gpio_tracedata, _, vsense_trigger_mirnat, _, _, _, _),
[53] = PINGROUP(53, qup1_se2, qup1_se2_l3_mirb, gcc_gp1, ddr_bist_stop, _, qdss_gpio_tracedata, _, _, _, _, _),
[54] = PINGROUP(54, qup1_se2_l2_mira, qup1_se6_l1_mirb, qdss_gpio_tracedata, gnss_adc1, atest_usb, ddr_pxi0, _, _, _, _, _),
@@ -1426,7 +1426,7 @@ static const struct msm_pingroup eliza_groups[] = {
[59] = PINGROUP(59, _, _, _, _, _, _, _, _, _, _, _),
[60] = PINGROUP(60, i2s0_sck, _, _, _, _, _, _, _, _, _, _),
[61] = PINGROUP(61, i2s0_ws, _, _, _, _, _, _, _, _, _, _),
[62] = PINGROUP(62, _, _, _, _, _, _, _, _, _, _, _),
[62] = PINGROUP(62, sdc2, _, _, _, _, _, _, _, _, _, _),
[63] = PINGROUP(63, resout_gpio, i2s0_data1, cci_timer, vfr_0, _, _, _, _, _, _, _),
[64] = PINGROUP(64, i2s0_data0, _, _, _, _, _, _, _, _, _, _),
[65] = PINGROUP(65, cam_mclk, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _),