mirrors/linux
2
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-05-10 23:33:01 -04:00
Code Issues Packages Projects Releases Wiki Activity

arm64: dts: mediatek: mt8192: Add GPU nodes

Browse Source 
The MediaTek MT8192 includes a Mali-G57 GPU supported in Panfrost. Add
the GPU node to the device tree to enable 3D acceleration.

The GPU node is disabled by default. It should be enabled by board with
its power supplies correctly assigned.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
[nfraprado: removed sram supply, tweaked opp node name, adjusted commit message]
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
[wenst@: disable GPU by default; adjusted prefix; split out board change]
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
[Angelo: cosmetic fixes]
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20230301095523.428461-8-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Alyssa Rosenzweig
2023-03-01 10:55:11 +01:00
committed by Matthias Brugger
parent c78838d803
commit e12333451e
1 changed files with 107 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

107
arch/arm64/boot/dts/mediatek/mt8192.dtsi
View File

@@ -312,6 +312,91 @@ timer: timer {
clock-frequency = <13000000>;
};
gpu_opp_table: opp-table-0 {
compatible = "operating-points-v2";
opp-shared;
opp-358000000 {
opp-hz = /bits/ 64 <358000000>;
opp-microvolt = <606250>;
};
opp-399000000 {
opp-hz = /bits/ 64 <399000000>;
opp-microvolt = <618750>;
};
opp-440000000 {
opp-hz = /bits/ 64 <440000000>;
opp-microvolt = <631250>;
};
opp-482000000 {
opp-hz = /bits/ 64 <482000000>;
opp-microvolt = <643750>;
};
opp-523000000 {
opp-hz = /bits/ 64 <523000000>;
opp-microvolt = <656250>;
};
opp-564000000 {
opp-hz = /bits/ 64 <564000000>;
opp-microvolt = <668750>;
};
opp-605000000 {
opp-hz = /bits/ 64 <605000000>;
opp-microvolt = <681250>;
};
opp-647000000 {
opp-hz = /bits/ 64 <647000000>;
opp-microvolt = <693750>;
};
opp-688000000 {
opp-hz = /bits/ 64 <688000000>;
opp-microvolt = <706250>;
};
opp-724000000 {
opp-hz = /bits/ 64 <724000000>;
opp-microvolt = <725000>;
};
opp-748000000 {
opp-hz = /bits/ 64 <748000000>;
opp-microvolt = <737500>;
};
opp-772000000 {
opp-hz = /bits/ 64 <772000000>;
opp-microvolt = <750000>;
};
opp-795000000 {
opp-hz = /bits/ 64 <795000000>;
opp-microvolt = <762500>;
};
opp-819000000 {
opp-hz = /bits/ 64 <819000000>;
opp-microvolt = <775000>;
};
opp-843000000 {
opp-hz = /bits/ 64 <843000000>;
opp-microvolt = <787500>;
};
opp-866000000 {
opp-hz = /bits/ 64 <866000000>;
opp-microvolt = <800000>;
};
};
soc {
#address-cells = <2>;
#size-cells = <2>;
@@ -1266,6 +1351,28 @@ mmc1: mmc@11f70000 {
status = "disabled";
};
gpu: gpu@13000000 {
compatible = "mediatek,mt8192-mali", "arm,mali-valhall-jm";
reg = <0 0x13000000 0 0x4000>;
interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "job", "mmu", "gpu";
clocks = <&apmixedsys CLK_APMIXED_MFGPLL>;
power-domains = <&spm MT8192_POWER_DOMAIN_MFG2>,
<&spm MT8192_POWER_DOMAIN_MFG3>,
<&spm MT8192_POWER_DOMAIN_MFG4>,
<&spm MT8192_POWER_DOMAIN_MFG5>,
<&spm MT8192_POWER_DOMAIN_MFG6>;
power-domain-names = "core0", "core1", "core2", "core3", "core4";
operating-points-v2 = <&gpu_opp_table>;
status = "disabled";
};
mfgcfg: clock-controller@13fbf000 {
compatible = "mediatek,mt8192-mfgcfg";
reg = <0 0x13fbf000 0 0x1000>;